EEE6432 Convolutional Code
EEE6432 Convolutional Code
Convolutional code
Prof. Jie Zhang & Dr. Jiliang Zhang
{jie.zhang, jiliang.zhang}@sheffield.ac.uk
Block code and convolutional codes
d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 × 𝑔 ( 0)
+¿
d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 × 𝑔 ( 1)
+¿
d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 × 𝑔 ( 2)
+¿
d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 × 𝑔 ( 3)
𝑔1 ( 𝑚) = {
0 else 2
0 {
1 𝑚=0 , 1, 2 𝑔 ( 𝑚 )= 1 𝑚=0 , 1
else
𝑔 3 (𝑚 )= {
1 𝑚=0 , 2
0 else
m0 m1 m2 m0 m1 m2 m0 m1 m2
x1 x2 x3
Convolutional code-encoder
m0 m1 m2 m1 m2 State
Example: Assuming bits 011011 is
0 0 A
transmitted, what is the output of the
encoder? 0 1 B
Transmitted 1 0 C
x1 x2 x3 Answer: 000 111 001 011 010 001
bits 1 1 D
m0 m1 m2 Current Next x1 x2 x3
state state
Solid lines denote inputting 0
0 0 0 A A 0 0 0 Dash lines denote inputting 1
1 0 0 A C 1 1 1
0 0 1 B A 1 0 1 A B
1 0 1 B C 0 1 0 000 101
0 1 0 C B 1 1 0 111 110
011
1 1 0 C D 0 0 1 C 010 D
0 1 1 D B 0 1 1 001 100
1 1 1 D D 1 0 0
Trellis diagram m0 m1 m2
m0 m1 m2 Current Next x1 x2 x3
state state
0 0 0 A A 0 0 0 x1 x2 x3
1 0 0 A C 1 1 1
0 0 1 B A 1 0 1
1 0 1 B C 0 1 0 A 000
0 1 0 C B 1 1 0 111 101
1 1 0 C D 0 0 1
B
0 1 1 D B 0 1 1 010
1 1 1 D D 1 0 0
110
C
0 1 1 0 1 1
A 000 000 000 000 000 000
111 101 111 101 111 101 111 101 111 101 111 101
B
010 010 010 010 010 010
110 110 110 110 110 110
C
011 001 011 001 011 001 011 001 011 001 011 001
D 100 100 100 100 100 100
A A C D B C D
000 111 001 011 010 001
Exercise:
m0 m1 m2
x1 x2
(a) Plot the trellis diagram of the convolutional code in the figure.
(b) Assuming the shift register is initialised with 00, find the
output sequence for an input bit sequence of 110110.
A B
Viterbi Algorithm 000 101
111 110
Definition: The Viterbi algorithm is a dynamic 011
C 010 D
programming algorithm for finding the most likely
sequence of hidden states that results in a sequence 001 100
of observed events.
0 1 1 0 1 1
A 000 000 000 000 000 000
111 101 111 101 111 101 111 101 111 101 111 101
B
010 010 010 010 010 010
110 110 110 110 110 110
C
011 001 011 001 011 001 011 001 011 001 011 001
D 100 100 100 100 100 100
A A C D B C D
000 111 001 011 010 001
After received bit sequence with errors at the receiver, as long as we can find the red
route, the information bits are obtained.
000
111 101
Decoding using the Viterbi algorithm
010
110
Example: Assuming bits 001 111 011 011 000 001
011 001
are transmitted.
100
Input
bits 001 111 011 011 000 001
A 1 1 4 4 6 5 7 5 5 4 5 5
5 6 8 6
1 5 5 4 7
B 3 3 2 6 6
4 4 3 8
2
3
3 6 6 6
C 2 1 4 4 3 6
2 5 5 3
4
4 2 7 6
D 4 7 2 5 5 6 5 7 3
Decoded
bits 000 111 001 011 010 001
Information 0 1 1 0 1 1
bits
Exercise:
m0 m1 m2
x1 x2