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ORCIDMartin Omaña 0001
Martin Eugenio Omana
Person information
- affiliation: University of Bologna, Department of Electrical, Electronic and Information Engineering, Italy
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2020 – today
- 2024
[c43]Martin Omaña, A. Manfredi, Cecilia Metra, R. Locatelli, M. Chiavacci, S. Petrucci:
Silent Data Corruption and Reliability Risks due to Faults Affecting High Performance Microprocessors' Caches. IOLTS 2024: 1-6- [c42]Sara Cretí, Martin Omaña, Cecilia Metra, Gianni Borelli:
Reliability of AI in Predicting the State of Health of Li-Ion Batteries*. IOLTS 2024: 1-7 - 2023
- [c41]William Fornaciari, Federico Reghenzani, Federico Terraneo, Davide Baroffio
, Cecilia Metra, Martin Omaña, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Robert Birke, Iacopo Colonnelli, Gianluca Mittone, Marco Aldinucci, Gabriele Mencagli, Francesco Iannone, Filippo Palombi, Giuseppe Zummo, Daniele Cesarini, Federico Tesser:
RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data Clusters. SAMOS 2023: 395-410 - 2022
- [j28]Marco Grossi, Meryem Bouras, Martin Omaña, Hassan Berbia:
Low-Cost Strategy to Detect Faults Affecting Scrubbers in SRAM-Based FPGAs. Microprocess. Microsystems 89: 104437 (2022) - [j27]Martin Omaña, Sejuti Bardhan, Cecilia Metra:
Reliability Risks Due to Faults Affecting Selectors of ReRAMs and Possible Solutions. IEEE Trans. Emerg. Top. Comput. 10(4): 2086-2091 (2022) - [c40]Marco Grossi, Martin Omaña, Daniele Rossi, Biagio Marzulli, Cecilia Metra:
Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function. IOLTS 2022: 1-7 - [c39]Fabrizio Finelli, Martin Omaña, Cecilia Metra:
Impact of Soft Errors on High Performance Autoencoders for Cyberattack Detection. LATS 2022: 1-6 - 2021
- [j26]Marco Grossi, Martin Omaña:
Investigation of the Impact of BTI Aging Phenomenon on Analog Amplifiers. J. Electron. Test. 37(4): 533-544 (2021) - [j25]Zahra Shirmohammadi, Ata Khorami, Martin Eugenio Omana:
ST-CAC: a low-cost crosstalk avoidance coding mechanism based on three-valued numerical system. J. Supercomput. 77(7): 6692-6713 (2021)
2010 – 2019
- 2019
- [j24]Martin Omaña, S. Govindaraj, Cecilia Metra:
Low-Cost Strategy for Bus Propagation Delay Reduction. J. Electron. Test. 35(2): 253-260 (2019) - [j23]Marco Grossi, Martin Omaña:
Impact of Bias Temperature Instability (BTI) Aging Phenomenon on Clock Deskew Buffers. J. Electron. Test. 35(2): 261-267 (2019) - [j22]Marco Grossi, Annachiara Berardinelli, Edward Sazonov, Wesley Beccaro, Martin Omaña:
Sensors and Embedded Systems in Agriculture and Food Analysis. J. Sensors 2019: 6808674:1-6808674:2 (2019) - [j21]Martin Omaña, Alessandro Fiore, Marco Mongitore, Cecilia Metra:
Fault-Tolerant Inverters for Reliable Photovoltaic Systems. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 20-28 (2019) - 2018
- [j20]Martin Omaña, TusharaSandeep Edara, Cecilia Metra:
Low-Cost Strategy to Mitigate the Impact of Aging on Latches' Robustness. IEEE Trans. Emerg. Top. Comput. 6(4): 488-497 (2018) - 2017
- [j19]Martin Omaña, Marco Padovani, Kreshnik Veliu, Cecilia Metra, Juergen Alt, Rajesh Galivanche:
New Approaches for Power Binning of High Performance Microprocessors. IEEE Trans. Computers 66(7): 1159-1171 (2017) - [j18]Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche:
Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 238-246 (2017) - 2016
- [j17]Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandrasekharan Tirumurti, Rajesh Galivanche:
Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. IEEE Trans. Computers 65(8): 2484-2494 (2016) - [c38]Martin Omaña, A. Fiore, Cecilia Metra:
Inverters' self-checking monitors for reliable photovoltaic systems. DATE 2016: 672-677 - 2015
- [j16]Martin Omaña, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Asifur Rahman, Simon Tam:
Low-Cost On-Chip Clock Jitter Measurement Scheme. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 435-443 (2015) - [j15]Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella:
Impact of Bias Temperature Instability on Soft Error Susceptibility. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 743-751 (2015) - [j14]Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra:
Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1031-1039 (2015) - [c37]Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich:
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS 2015: 157-162 - 2014
- [j13]Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak:
Clock Faults Induced Min and Max Delay Violations. J. Electron. Test. 30(1): 111-123 (2014) - [c36]Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche:
Power droop reduction during Launch-On-Shift scan-based logic BIST. DFT 2014: 21-26 - 2013
- [j12]Daniele Rossi, Martin Omaña, G. Garrammone, Cecilia Metra, Abhijit Jas, Rajesh Galivanche:
Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. J. Electron. Test. 29(3): 401-413 (2013) - [j11]Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra:
Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Trans. Computers 62(3): 496-509 (2013) - [j10]Martin Omaña, Daniele Rossi, Daniele Giaffreda, Roberto Specchia, Cecilia Metra, Marcin Marzencki, Bozena Kaminska:
Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2286-2294 (2013) - [c35]Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache:
Novel approach to reduce power droop during scan-based logic BIST. ETS 2013: 1-6 - 2012
- [j9]Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam:
New Design for Testability Approach for Clock Fault Testing. IEEE Trans. Computers 61(4): 448-457 (2012) - [c34]Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, Marta Bagatin, Alessandro Paccagnella:
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT 2012: 121-125 - [c33]Martin Omaña, Daniele Rossi, G. Collepalumbo, Cecilia Metra, Fabrizio Lombardi:
Faults affecting the control blocks of PV arrays and techniques for their concurrent detection. DFT 2012: 199-204 - 2011
- [j8]Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam:
Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2322-2325 (2011) - [c32]Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella:
Impact of Aging Phenomena on Soft Error Susceptibility. DFT 2011: 18-24 - [c31]Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra:
Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. DFT 2011: 252-258 - 2010
- [j7]Martin Omaña, Daniele Rossi, Cecilia Metra:
High-Performance Robust Latches. IEEE Trans. Computers 59(11): 1455-1465 (2010) - [c30]Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra:
Novel low-cost aging sensor. Conf. Computing Frontiers 2010: 93-94 - [c29]Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche:
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. Conf. Computing Frontiers 2010: 113-114 - [c28]Martin Omaña, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Simon Tam, Asifur Rahman:
On-die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter. DFT 2010: 265-272 - [c27]Daniele Rossi, Martin Omaña, Cecilia Metra:
Transient Fault and Soft Error On-die Monitoring Scheme. DFT 2010: 391-398 - [c26]Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra:
Secure communication protocol for wireless sensor networks. EWDTS 2010: 17-20
2000 – 2009
- 2009
- [j6]Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. Very Large Scale Integr. Syst. 17(8): 1161-1166 (2009) - [c25]Martin Omaña, Daniele Rossi, Cecilia Metra:
Novel High Speed Robust Latch. DFT 2009: 65-73 - [c24]Martin Omaña, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska:
Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. DFT 2009: 127-135 - 2008
- [j5]Daniele Rossi, Martin Omaña, Cecilia Metra:
Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. J. Electron. Test. 24(1-3): 93-103 (2008) - [c23]Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam:
Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors. DFT 2008: 465-473 - [c22]Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche:
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. ETS 2008: 171-176 - 2007
- [j4]Martin Omaña, Daniele Rossi, Cecilia Metra:
Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Trans. Computers 56(9): 1255-1268 (2007) - [c21]Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam:
Novel compensation scheme for local clocks of high performance microprocessors. ITC 2007: 1-9 - [c20]Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam:
Novel Approach to Clock Fault Testing for High Performance Microprocessors. VTS 2007: 441-446 - 2006
- [c19]Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE 2006: 170-175 - [c18]Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak:
Can Clock Faults be Detected Through Functional Test? DDECS 2006: 168-173 - [c17]Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS 2006: 17-22 - [c16]Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni:
Checker No-Harm Alarm Robustness. IOLTS 2006: 275-280 - 2005
- [b1]Martin Omaña:
Advanced techniques for concurrent fault detection. University of Bologna, Italy, 2005 - [j3]Martin Omaña, Daniele Rossi, Cecilia Metra:
Low Cost and High Speed Embedded Two-Rail Code Checker. IEEE Trans. Computers 54(2): 153-164 (2005) - [j2]José Manuel Cazeaux, Martin Omaña, Cecilia Metra:
Novel on-chip circuit for jitter testing in high-speed PLLs. IEEE Trans. Instrum. Meas. 54(5): 1779-1788 (2005) - [c15]Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
The Other Side of the Timing Equation: a Result of Clock Faults. DFT 2005: 169-177 - [c14]Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra:
Multiple Transient Faults in Logic: An Issue for Next Generation ICs. DFT 2005: 352-360 - [c13]José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28 - [c12]Martin Omaña, O. Losco, Cecilia Metra, Andrea Pagni:
On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. IOLTS 2005: 163-168 - [c11]Martin Omaña, Daniele Rossi, Cecilia Metra:
Low Cost Scheme for On-Line Clock Skew Compensation. VTS 2005: 90-95 - 2004
- [j1]Martin Omaña, Daniele Rossi, Cecilia Metra:
Model for Transient Fault Susceptibility of Combinational Circuits. J. Electron. Test. 20(5): 501-509 (2004) - [c10]Cecilia Metra, T. M. Mak, Martin Omaña:
Fault secureness need for next generation high performance microprocessor design for testability structures. Conf. Computing Frontiers 2004: 444-450 - [c9]Cecilia Metra, T. M. Mak, Martin Omaña:
Are Our Design for Testability Features Fault Secure? DATE 2004: 714-715 - [c8]Martin Omaña, Daniele Rossi, Cecilia Metra:
Fast and Low-Cost Clock Deskew Buffer. DFT 2004: 202-210 - [c7]José Manuel Cazeaux, Martin Omaña, Cecilia Metra:
Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. IOLTS 2004: 17-24 - [c6]Cecilia Metra, A. Ferrari, Martin Omaña, Andrea Pagni:
Hardware Reconfiguration Scheme for High Availability Systems. IOLTS 2004: 161-166 - [c5]Cecilia Metra, T. M. Mak, Martin Omaña:
Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. ITC 2004: 1223-1231 - 2003
- [c4]Martin Omaña, Daniele Rossi, Cecilia Metra:
High Speed and Highly Testable Parallel Two-Rail Code Checker. DATE 2003: 10608-10615 - [c3]Cecilia Metra, Stefano Di Francescantonio, Martin Omaña:
Automatic Modification of Sequential Circuits for Self-Checking Implementation. DFT 2003: 417-424 - [c2]Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra:
A Model for Transient Fault Propagation in Combinatorial Logic. IOLTS 2003: 111- - [c1]Martin Omaña, Daniele Rossi, Cecilia Metra:
Novel Transient Fault Hardened Static Latch. ITC 2003: 886-892
Coauthor Index
[c43] [c42] [c41] [j27] [c40] [c39] [j24] [j21] [j20] [j19] [j18] [j17] [c38] [j16] [j15] [j14] [c37] [j13] [c36] [j12] [j11] [j10] [c35] [j9] [c34] [c33] [j8] [c32] [c31] [j7] [c30] [c29] [c28] [c27] [c26] [j6] [c25] [c24] [j5] [c23] [c22] [j4] [c21] [c20] [c19] [c18] [c17] [c16] [j3] [j2] [c15] [c14] [c13] [c12] [c11] [j1] [c10] [c9] [c8] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
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