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ORCIDAbdelkarim Mercha
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2010 – 2019
- 2017
[j11]Trong Huynh Bao, Julien Ryckaert, Zsolt Tokei
, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1669-1680 (2017)- 2015
- [c33]Bertrand Parvais, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo:
A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. A-SSCC 2015: 1-4 - [c32]Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, An Steegen:
Holisitic device exploration for 7nm node. CICC 2015: 1-5 - [c31]Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT 2015: 1-4 - [c30]Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT 2015: 1-4 - [c29]Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Impact of device and interconnect process variability on clock distribution. ICICDT 2015: 1-4 - [c28]Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean:
Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT 2015: 1-4 - [c27]Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Impact of fin shape variability on device performance towards 10nm node. ICICDT 2015: 1-4 - [c26]Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer:
Lateral NWFET optimization for beyond 7nm nodes. ICICDT 2015: 1-4 - 2014
- [c25]Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, Mircea Dusa, Arindam Mallik, Sushil Sakhare, Boris Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, Philippe Leray, Tsung-Te Liu, Kenichi Miyaguchi, Bertrand Parvais, Pieter Schuddinck, Philippe Weemaes, Abdelkarim Mercha, Jürgen Bömmels, Naoto Horiguchi, Greg McIntyre, Aaron Thean, Zsolt Tökei, Shaunee Cheng, Diederik Verkest, An Steegen:
Design Technology co-optimization for N10. CICC 2014: 1-8 - [c24]Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq:
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC 2014: 102-105 - 2013
- [c23]Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest:
TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC 2013: 24:1-24:6 - [c22]Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha:
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process. ESSDERC 2013: 159-162 - 2012
- [c21]Wei Guo, Geert Van der Plas, Andrej Ivankovic, Geert Eneman, Vladimir Cherman, Bart De Wachter, Abdelkarim Mercha, Mario Gonzalez, Yann Civale, Augusto Redolfi, Thibault Buisson, A. Jourdan, Bart Vandevelde, Kenneth J. Rebibis, Ingrid De Wolf, Antonio La Manna, Gerald Beyer, Eric Beyne, Bart Swinnen:
3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps. ICICDT 2012: 1-4 - 2011
- [j10]Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal:
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. IEEE J. Solid State Circuits 46(1): 293-307 (2011) - [c20]Andrej Ivankovic, Geert Van der Plas, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, Wenqi Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte:
Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC 2011: 1-5 - [c19]Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas:
An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations. DATE 2011: 505-506 - 2010
- [c18]Geert Van der Plas, Steven Thijs, Dimitri Linten, Guruprasad Katti, Paresh Limaye, Abdelkarim Mercha, Michele Stucchi, Herman Oprins, Bart Vandevelde, Nikolaos Minas, Miro Cupac, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal:
Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. CICC 2010: 1-4 - [c17]Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal:
3D integration: Circuit design, test, and reliability challenges. IOLTS 2010: 217 - [c16]Wen-Chieh Wang, Zue-Der Huang, Geert Carchon, Abdelkarim Mercha, Stefaan Decoutere, Walter De Raedt, Chung-Yu Wu:
45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors. ISCAS 2010: 741-744 - [c15]Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne:
Design issues and considerations for low-cost 3D TSV IC technology. ISSCC 2010: 148-149 - [c14]Vaidyanathan Subramanian, Abdelkarim Mercha, Bertrand Parvais, Morin Dehan, Guido Groeseneken, Willy M. C. Sansen, Stefaan Decoutere:
Identifying the Bottlenecks to the RF Performance of FinFETs. VLSI Design 2010: 111-116
2000 – 2009
- 2009
- [c13]Jan Van Olmen, Jan Coenen, Wim Dehaene, Kristin De Meyer, Cedric Huyghebaert, Anne Jourdain, Guruprasad Katti, Abdelkarim Mercha, Michal Rakowski, Michele Stucchi, Youssef Travaly, Eric Beyne, Bart Swinnen:
3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV). 3DIC 2009: 1-5 - [c12]Thomas Chiarella, Liesbeth Witters, Abdelkarim Mercha, Christoph Kerner, Rok Dittrich, Michal Rakowski, Claude Ortolland, Lars-Åke Ragnarsson, Bertrand Parvais, An De Keersgieter, Stefan Kubicek, Augusto Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, Philippe Absil, S. Biesemans, Thomas Y. Hoffmann:
Migrating from planar to FinFET for further CMOS scaling: SOI or bulk? ESSCIRC 2009: 84-87 - [c11]Jonathan Borremans, Steven Thijs, Morin Dehan, Abdelkarim Mercha, Piet Wambacq:
Low-cost feedback-enabled LNAs in 45nm CMOS. ESSCIRC 2009: 100-103 - [c10]Domagoj Siprak, Piet Wambacq, Bertrand Parvais, Abdelkarim Mercha, Michael Fulde, Jesenka Veledar Kruger, Morin Dehan, Stefaan Decoutere:
FinFET RF receiver building blocks operating above 10 GHz. ESSCIRC 2009: 360-363 - 2008
- [c9]Piet Wambacq, Abdelkarim Mercha, Karen Scheir, Bob Verbruggen, Jonathan Borremans, Vincent De Heyn, Steven Thijs, Dimitri Linten, Geert Van der Plas, Bertrand Parvais, Morin Dehan, Stefaan Decoutere, Charlotte Soens, Nadine Collaert, Malgorzata Jurczak:
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. ISSCC 2008: 528-529 - 2007
- [j9]Kerem Akarvardar, Abdelkarim Mercha, Eddy Simoen, Vaidyanathan Subramanian, Cor Claeys, Pierre Gentil, Sorin Cristoloveanu:
High-temperature performance of state-of-the-art triple-gate transistors. Microelectron. Reliab. 47(12): 2065-2069 (2007) - [j8]Piet Wambacq, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, Geert Van der Plas, Abdelkarim Mercha, Bertrand Parvais, Cedric Gustin, Vaidyanathan Subramanian, Nadine Collaert, Malgorzata Jurczak, Stefaan Decoutere:
The Potential of FinFETs for Analog and RF Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2541-2551 (2007) - [c8]Bertrand Parvais, S. Hu, Morin Dehan, Abdelkarim Mercha, Stefaan Decoutere:
An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs. CICC 2007: 503-506 - [c7]Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC 2007: 123-126 - [c6]Bertrand Parvais, Vaidyanathan Subramanian, Abdelkarim Mercha, Morin Dehan, Piet Wambacq, Willy Sansen, Guido Groeseneken, Stefaan Decoutere:
FinFET technology for analog and RF circuits. ICECS 2007: 182-185 - 2006
- [j7]Joan Marc Rafí, Eddy Simoen, Kiyoteru Hayama, Abdelkarim Mercha, Francesca Campabadal, Hidenori Ohyama, Cor Claeys:
Hot-carrier-induced degradation of drain current hysteresis and transients in thin gate oxide floating body partially depleted SOI nMOSFETs. Microelectron. Reliab. 46(9-11): 1657-1663 (2006) - [j6]Kiyoteru Hayama, Kenichiro Takakura, K. Shigaki, Hidenori Ohyama, Joan Marc Rafí, Abdelkarim Mercha, Eddy Simoen, Cor Claeys:
Impact on the back gate degradation in partially depleted SOI n-MOSFETs by 2-MeV electron irradiation. Microelectron. Reliab. 46(9-11): 1731-1735 (2006) - [c5]Stefaan Decoutere, Piet Wambacq, Vaidy Subramanian, Jonathan Borremans, Abdelkarim Mercha:
Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges. CICC 2006: 679-686 - 2005
- [j5]Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Stefaan Decoutere, Florence Cubaynes:
RFCV Test Structure Design for a Selected Frequency Range. IEICE Trans. Electron. 88-C(5): 817-823 (2005) - [j4]Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere:
A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS. IEEE J. Solid State Circuits 40(7): 1434-1442 (2005) - [j3]Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Piet Wambacq, Morin Dehan, Lars Aspemyr, Andries J. Scholten, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt:
Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors. IEEE J. Solid State Circuits 40(9): 1922-1931 (2005) - [j2]Kiyoteru Hayama, Kenichiro Takakura, Hidenori Ohyama, S. Kuboyama, S. Matsuda, Joan Marc Rafí, Abdelkarim Mercha, Eddy Simoen, Cor Claeys:
Radiation source dependence of performance degradation in thin gate oxide fully-depleted SOI n-MOSFETs. Microelectron. Reliab. 45(9-11): 1376-1381 (2005) - [c4]Dimitri Linten, Xiao Sun, Steven Thijs, M. I. Natarajan, Abdelkarim Mercha, Geert Carchon, Piet Wambacq, Takeshi Nakaie, Stefaan Decoutere:
Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors. CICC 2005: 497-500 - [c3]Abdelkarim Mercha:
Technology and architecture for deep submicron RF CMOS technology. SBCCI 2005: 4 - 2004
- [j1]Kiyoteru Hayama, Kenichiro Takakura, Hidenori Ohyama, Abdelkarim Mercha, Eddy Simoen, Cor Claeys, Joan Marc Rafí, Michael Kokkoris:
Degradation of electrical performance and floating body effect in ultra thin gate oxide FD-SOI n-MOSFETs by 7.5-MeV proton irradiation. Microelectron. Reliab. 44(9-11): 1721-1726 (2004) - [c2]Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Lars Aspemyr, Andries J. Scholten, Piet Wambacq, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt:
A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor. CICC 2004: 701-704 - [c1]Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere:
A 5 GHz fully integrated ESD-protected low-noise amplifier in 90 nm RF CMOS. ESSCIRC 2004: 291-294
Coauthor Index
Aaron Thean
aka: Aaron Voon-Yew Thean
aka: Aaron Voon-Yew Thean
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