lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
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Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
OpenTitan: Open source silicon root of trust
Common SystemVerilog components
A minimal GPU design in Verilog to learn how GPUs work from the ground up
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Tile based architecture designed for computing efficiency, scalability and generality
BaseJump STL: A Standard Template Library for SystemVerilog