INSTITUTION

DEPARTMENT
MODULE TITLE
MODULE CODE
MODULE LECTURER

FOURAH BAY COLLEGE

ELECTRICAL AND ELECTRONIC ENGINEERING
COMPUTER AIDED DESIGN
EENG527
PROF JONAS A S REDWOOD-SAWYERR
Mobile : +232 76 670904, +232 88 001019, +232 25 273401

CONTACTS

LECTURE HOURS/LAB.

Email : jasredwood@usl.edu.sl, abiosehrs@gmail.com,

jredwood_sawyerr@yahoo.com
3-0-3

PRACTICALS/CREDIT HOURS

ASSESSMENT

OBJECTIVES AND
OUTCOMES
1|Page

Examination will account for 70% of the overall grade whilst continuous
assessment will account for 30% of which 5% is allocated to class attendance.
Of the 70% allocated to examinations, 40% will be drawn from a Simulation
CAD examination and 60% from the CAD Theory examinations. Question sets
at the end of each lecture must be returned for grading one week after receipt
of lectures and will account for 10% of the continuous assessment grade.
This module aims at introducing students to the fundamentals of Computer
Aided Design theory and application as well as providing hands-on application

of CAD software in design exercises.

GENERAL OBJECTIVES:
1. To understand the purpose of computer simulation in design and the
basic principles required in the development of software for CAD
applications
2. To understand how circuits can be modelled in readiness for CAD
applications.
3. To understand the concepts in Graph Theory as a preparatory tool for
computer aided design.
4. To understand and apply CAD software in simulating practical circuits
with a view to comparing theoretical and simulated results.
5. To understand the basics of Sensitivity analysis in circuit theory and
design.
6. To understand the theory of computer graphics and design principles.
MODULE DESCRIPTION

2|Page

Why do we simulate? Issues of previewing the implementation of a design

using an electronic worksheet with the flexibility of component modification to
meet a given design output.
Basic modelling of circuit components for computer analysis.
Rules for Formulating the [Y], [V] and [I] matrices in CAD nodal analysis.
Tabular preparation of circuit description.
Deriving the set of simultaneous equations in readiness for nodal analysis by
inspection.
Loop or Mesh circuit analysis: Formulating the [Z], [I] and [E] matrices, Rules
for formulating the matrices by inspection.
Graph theory in circuit analysis: Basic cut set matrix, Basic loop set matrix,
Effect of sources on the graphs, Effect of the topology on the formulation of
nodal equations, Formulation of the Incidence matrix, Effect of circuit topology
in the formulation of loop equations, Formulation of Augmented matrices for
loop and nodal analysis.

SUGGESTED
READINGREFERENCE

Introduction to a CAD package The Electronic Work Bench and MultiSim.

Practical sessions and simulation exercises with examples of comparison of
simulated and practical results. Circuit sensitivity analysis - Importance of
sensitivity analysis, Definition of Sensitivity functions, Zero and pole
sensitivity. Computer graphics and design principles, Characteristics of a
graphics package, The configuration of a graphics system software.
Functions of a graphics package: Formulation of the Transformation, Scaling
and Rotation matrices in 2D and 3D forms, Introduction to the Visio graphics
package.
References
1. R Raghuram. Computer Simulation of Electronic Circuits. John Wiley.
2. http://www.elect.mrt.ac.lk/EE201_matrix_analysis.pdf

TEXTS/MANUALS/WEBSITES
LECTURE NUMBER
LECTURE DURATION

01 Network analysis using an iterative approach to nodal analysis

02

(HOURS)
SPECIFIC INSTRUCTIONAL
OBJECTIVES AND LEARNING
OUTCOMES

At the end of this lecture the students should be able to :

1. Develop and solve iterative matrix equations of circuits for loop analysis
using a tabular circuit description approach.
2. Derive nodal and loop equations by inspection.
3. Understand the basic definitions and principles of Graph Theory in circuit
analysis.

1.0 INTRODUCTION:
Welcome to Module EENG527, Computer Aided Design, EENG 527
General description

3|Page

Computer Aided design provides a platform for simulating design exercises using a simulation software package.
These packages have a varying degree of sophistication in terms of their robustness, range of application, speed
of simulation and ease of use or user friendliness. Many of these packages come in different categories either as
educational or professional packages, with the latter having a more comprehensive portfolio of applications with
an attendant price margin.
Each package is constructed using mathematical models for circuit components based on their intrinsic
characteristics. The more accurate the model representation the more expensive and of course robust will be
the simulation.
The circuit theories encountered during the earlier years of the course will be called to bear as this module is
offered. Nodal and mesh analysis of circuits will be used in some of the analysis in transforming a given circuit
into the model for simulation. Knowledge of matrix manipulation will be assumed.
References have been made to a number of text books which are listed in the section for Further Reading, and
modifications made for a coherent and reader-friendly presentation with worked examples and assignments
provided.
Why simulate?
Baseline:
1. Very simple circuits with few unknowns often require lengthy and laborious analysis using simultaneous equations.
The more complicated the circuit the larger the number of unknowns encountered and hence the more complicated
and time consuming the process of solving the equation set.
2. Solution of matrices using well known methods can be quite demanding. Some of the methods include Cramers
Rule, the Runga-Kutta predictor-corrector Rule, Gaussian Elimination method, the Gauss-Jordan method and the
Newton Raphson method.
3. Certain responses of circuits, e.g. step and ramp responses are very difficult to solve manually especially when all
stray capacitances (non-linear) are considered.

Let us briefly consider a simple TTL NAND/AND circuit as shown in Fig.1.1

4|Page

Fig. 1.1. AND gate with open-collector o/p

The circuit contains multi-emitter transistors and standard transistors and diodes. The bipolar transistor can be
represented by its hybrid equivalent circuit model as shown in Fig. 1.2.

Fig 1.2.
5|Page

a. Bipolar transistor.

b. Hybrid equivalent circuit

Furthermore the hybrid model of an amplifier is shown in Fig 1.3 including bias resistors. Considering the simple
TTL circuit it can readily be seen that the equivalent circuit of such a circuit will be complicated and difficult to
solve manually. If we now scale up this circuit to VLSI circuits consisting of millions of transistors, then using this
approach to circuit analysis will be impossible to solve manually.
i2
For the BC107 bipolar transistor for example
hre = 3 x 10-4.
hfe forward current gain 250
hoe = o/p admittance = 300S
Fig. 1.3. Hybrid equivalent circuit of an amplifier with hre (reverse voltage transfer ratio, and hoe (o/p admittance)
neglected
2.2.

Circuit or network elements

The behaviour of circuit elements determine the category in which they can be placed, i.e. linear, non-linear, active,
passive, dissipative or storage, time varying or constant, etc. Let us now consider some of the basic elements that will be
used in our analysis.
1.3 Some basic elements
Table 1.0 shows the circuit elements to be used as well as the various categories of dependent or controlled sources.
Independent voltage and current sources will also be used.
Table 1.0. Elements and dependent sources
Circuit
Controlled (dependent)
elements
sources
Resistors
Voltage controlled voltage

6|Page

Inductors
Capacitors

source VCVS
Current controlled voltage
source CCVS
Voltage controlled current
source VCCS
Current controlled current
source - CCCS

1.4 Types of analyses

There are a number of analyses which can be conducted depending of course on the type of component and the signal
input. These are now discussed as follows :
1. DC linear analysis. This is important as most other analyses can be approximated by piece-wise linear models.
2. DC non-linear analysis. A simple circuits as shown in Fig. 1.4 shows results in a DC non-linear analysis since the
diode is a non-linear device.
3. Its characteristic can however be approximated by a DC piece-wise model.

Fig. 1.4. Diode circuit

4. Ac linear sinusoidal steady state analysis. An example is the frequency response of filters and amplifiers.
5. Transient linear and non-linear analysis, e.g. step response of networks or in general responses of networks to
signals or excitations with arbitrary variations as a function of time.

1.5. Importance of device models

The following discussion points are important :
a. All circuit simulators have built-in models (mathematical models) for common components such as semiconductors

7|Page

devices, e.g. Timers, TTLs, CMOS, etc.

b. The quality of the simulation is determined by the accuracy of the models to the real situation. In this situation a
trade-off is often made between speed of computation and accuracy of the results. A number of the models use
well known numerical approximations to solve the set of equations derived. These are usually iterative processes
and the larger the number of iterations the greater the accuracy of the results. This has attendant cost implications.
c. In some situations the designer may have to build his own model if a similar one does not exist.
d. Some logic simulators also make provision for addition functional blocks to be added to their repertoire or library of
components.

DC Analysis of linear networks

Derivation of iterative network Equations Some common techniques
NODAL ANALYSIS AND GRAPH THEORY IN NETWORK SOLUTION [Redwood-Sawyerr, J A S. Computer Aided
Design and simulation using Electronic Work Bench and Polymath. (Book in writing) ]
Theory
Nodal voltage analysis is derived from the basic Kirchoffs current law applied at the nodes of the circuit to be
analysed.

[ Y ][ V ] =[ I ]

4.1.

where

[ Y ] Node Admittance

[ V ] Vector of unknownvoltages
[ I ] Equivalent current source vector obtained independent sources
Let us now consider a simple passive circuit in Fig.1.5, and derive its nodal equations from 1 st principle (KCL)
8|Page

2
VCCS

Fig. 1.5. Circuit for analysis

Node A
V A V B V A V C
+
=I 1
R1
R4

Node B
V BV A V B
+ g m ( V AV C ) =0
R1
R2

Node C

9|Page

V C V A V C
+ + gm ( V A V C )=0
R4
R3

In matrix form we obtain

1 1
+
R1 R4
1
gm
R1
1
g m
R4

1
R1
1 1
+
R1 R2
0

1
R4
gm
1 1
+ g m
R 3 R4

[ ][]
VA
I1
VB = 0
0
VC

i.e.

[ Y ][ V ] =[ I ]

Direct derivation of nodal equations

The following are the rules for the direct formulation of the Nodal voltage matrix [V] and the Equivalent current
source vector [I] by inspection:
i. The diagonal elements of the [Y] matrix are obtained using the expression
Yii = admittances connected to node i
ii. The off-diagonal elements of the matrix [Y] are negative and given by the expression:
Yij = - admittances connected between nodes i and j.
iii. The ith element of the Right Hand Side vector [I] is obtained by the expression
10 | P a g e

Ii = current produced by independent sources entering node i.

These matrices can be derived using a tabular description of the circuit.
1. In the derivation of the above matrices it is assumed that all sources are either independent current sources or
voltage controlled current sources (VCCS). Where for example a current controlled current source (CCCS) is present
in the circuit, a simple conversion to a voltage controlled current source (VCCS) can be made, using the nodal
voltages of the resistor element providing the current control.
2. The terminals of all circuit elements are labelled as N + and N-.
3. The earth node is represented by Node 0.
4. Labelling of the terminals of current sources (independent or controlled) denotes the positive flow of currents, and
the symbols N+ and N- denote this direction.
5. Where there is a VCCS, two additional identifiers are used for the controlling nodes, i.e. NC + and NC-. The resulting
controlling voltage is then given by [V(NC +) V(NC-)].

The derivation of these matrices uses an iterative numerical solution which lends itself to computer
programming and simulation.
Let us now return to our analysis circuit as shown.
The branches are labeled 1 to n

Current directions (arbitrary) are inserted.

The difference between the branch and
Controlling nodes must be emphasized.

VCCS
5

11 | P a g e

Tabular description
Table 4.1. Circuit description
Branc N NCompone
+
h No.
nt type
1
2

1
3

2
2

R
G

3
4
5
6

3
2
0
1

0
0
1
3

R
R
I
R

Compone
nt Value
1000
2(in
mhos)
3000
4000
2
6000

Controlli
ng Node
NC+
1

Controlli
ng Node
NC3

FORMULATION OF THE MATRIX ELEMENTS

All the branches of the circuit are first labeled from 1 to n, taking note of the current directions. The following
steps are then taken.
1. All array elements are set to zero, i.e. Yij = 0. Ii = 0
2. The admittances for all resistor elements connected between nodes N+ and N- where N+ and N- are nonzero are obtained by the following expressions
a. Diagonal entries
1
YN+N+ = YN+N+ + R
2.
YN-N- = YN-N- +

1
R

Also for resistors connected between node N and Node 0 where N = N+ or N- we obtain

12 | P a g e

YNN = YNN +

1
R

4.

b. Off-diagonal entries
1
YN+N- = YN+N- - R
YN-N+ = YN-N+ -

1
R

3. Admittances generated by VCCSs connected between Nodes N+ and N- with controlling nodes NC+ and NCare obtained as follows:
a. YN+NC+ = YN+NC+ + G
7
YN+NC- = YN+NC- - G
8
YN-NC+ = YN-NC+ - G
9
YN-NC- = YN-NC- + G
10
4. There are no values returned for row and column entries where N+. N-, NC+ and NC- are zero.
5. The elements for the independent current vector where sources Is are connected between Nodes N+ and Nare obtained as follows:
a. IN+ = IN+ - Is
11
IN- = IN- + Is
12
For the case of N = 0, the row entry is zero as given by the theory.
Illustrative Exercises
A network is given in Fig. 4.7 consisting of passive elements and current generators. Determine the nodal
voltages using the iterative method.

7
13 | P a g e

2
1

v
1

O
Fig. 4.7. Network of resistors and current sources
Analysis
Table 4.4. Tabular description of Fig. 4.7, (NB. The controlling voltage v is given by V1 V0)
Branc
h No.
1
2
3
4
5
6
7

Nod Nod
e N+ e N0
1
0
0
1
2
2

1
0
2
3
2
3
3

Compone
nt type

Compone
nt Value

I
R
R
R
R
gm
R

6
5
3
2
1
0.1
2

Initializing the variables we can write

Y(ij) = 0; I(i) = 0
14 | P a g e

Controlli
ng Node
NC+
1
-

Controlli
ng Node
NC0
-

Calculating the nodal matrix elements we obtain:

Diagonal elements (Eqns 2 and 3)
YN+N+ : For N+ = 1and 2 we have
Y11 = 0 + 1 = 1

Y22 = 0 + =

Row 5

Row 7

YN-NN- = 2: YN+N+ = Y22= + 1 = 3/2

N- = 3 : Y33= 0 + =
Rows connected between N+, N- and Node N = 0
Y11 = 1/5 + 1 = 6/5

Row 2.

3 1 11
+ =
2 3 6

Row 3

Y33 = + = 1

Row 4

Row 5 (Eqns. 5 & 6)

Y22 =

Off-diagonal elements
YN+N- = YN+N- -

1
R

YN-N+ = YN-N+ -

1
R

Thus we obtain :
YN+N- : Y12 = -1 = Y21
Y13 = 0
15 | P a g e

Y23 = -

Row 7

Using controlling nodes we can write :

N+ = 2; N- = 3; NC+ = 1; NC- = 0
Eqns 7-10, are quoted for ease of reference.
YN+NC+ = YN+NC+ + G
YN+NC- = YN+NC- - G
YN-NC+ = YN-NC+ - G
YN-NC- = YN-NC- + G

7.
8.
9.
10.

Hence we obtain
Y21 = -1 + 1/10 = -9/10
Y20 = 0
Y31 = -gm = -1/10
Y30 is omitted according to the rules of formulation above.
Current vector calculation
Here N+ = 0 and N- = 1
IN+ = IN+ IS = 0, i.e. IN+ = I0 is omitted.
IN- = IN- + IS = I1 = 6
Having obtained all the elements of the matrix we can then write the nodal voltage equation as

16 | P a g e

[ ]
6
5
9
10
1
10

1
11
6
1
2

[]

v1
6
1
v2 = 0
2
0
v3
1

13.

The linear set of equations can be written from above as

6
v v =6
5 1 2

14

9
11
1
v + v v =0
10 1 6 2 2 3

15.

1
1
v 1 v +v 3 =0
10
2 2

16.

Solving algebraically or using matrix methods yields

v1 = 10 V ; v2 = 6 V ; v3 = 4 V.
Exercise 1.1

17 | P a g e

A network is given in Fig Q1 consisting of passive elements and current generators.

a. Tabulate the circuit description in readiness for computer simulation
b. Using the iterative equations, derive the nodal matrix equations and calculate the voltages v1, v2 and v3.
7
5

i
4

Fig. 4.1. Labelled circuit ready for analysis

Analysis
The circuit has a current controlled current source (CCCS). For our analysis we will convert this to a VCCS so
that the nodal analysis method can be used as described in the theory.
In this case the dependent current source 2i A becomes

2 ( v 1v 2 )
=2 ( v 1v 2 ) .
1

All resistor values are in ohms.

Table 4.1. Circuit description
Branc N NCompone
h No. +
nt type
1
18 | P a g e

Compone
nt Value
2

Controlli
ng Node
NC+
-

Controlli
ng Node
NC-

2
3
4
5
6
7

2
0
0
1
3
1

0
3
1
2
2
3

R
I
I
R
G
R

3
1A
7A
1
2
4

1
-

Matrix formulation equations

Initialising the elements we obtain Y(ij) = 0; I(i) = 0
Diagonal Terms: YN+N+ and YN-NYN+N+
Row 5 :

Y11 = 1

Row 7 :

Y11 = 1 + = 5/4

YN-NRow 5 :

Y22 = 1

Row 7 :

Y33 =

YNN (i.e. elements formed when one node is the Node 0)

Row 1 :

Y11 = Y11 + = 5/4 + = 7/4.

Row 2 :

Y22 = Y22 + 1/3 = 1 + 1/3 = 4/3

Off diagonal terms

Row 5:

Y12 = -1 = Y21.

Row 7 :

Y13 = - = Y31

Values affected by the controlling nodes of the VCCS

19 | P a g e

2
-

Here the terminal nodes of the VCCS are N+ = 3, N- = 2. The controlling nodes are NC+ = 1, NC- = 2
Hence we can write
YN+NC+ = Y31 = - + 2 = 7/4
YN+NC- = Y32 = -G = -2
YN-NC+ = Y21 = -1 -2 = -3
YN-NC- = Y22 = 4/3 + G = 4/3 + 2 =

10
3

Current Vector
Branch 4.
Here IN- = I1 = 7 A
Branch 3.
IN- = I3 = 1 A
All the matrix elements have now been determined. The Nodal matrix equation then becomes :
[Y][V] = [I]
i.e.

20 | P a g e

[ ]
7
4

10
3

7
4

1
4

[]

v1
7
0 v 2 = 0
1
v3
1
4

17.

The linear set of equations can be written from above as

7
1
v 1v 2 v 3=7
4
4
3 v 1+

10
v =0
3 2

7
1
v 2 v 2 + v3 =1
4 1
4

18.

19

20

Eqn. 4.15 can be rewritten as

v 1=

10
v
9 2

21.

Hence substituting in Eqn (18) for v1 we obtain

70
1
v v v =7
36 2 2 3 4
Also Eqn (20) becomes

21 | P a g e

22.

70
1
v 2 2 v 2+ v 3 =1
36
4

23.

Adding Eqns (22) and (23) we obtain

140
v 3 v 2=8
36 2
Giving

v 2=9V

Hence from Eqn. 21 we obtain

v 1=

10
v =10 V
9 2

Substituting for v1 and v2 in Eqn (4.14) we obtain

v 3=6 V
The equation can also be solved using matrices.
Assignment 1.0
Determine the nodal voltages for the theory circuit as shown.
6

1
22 | P a g e

VCCS
5

MODE AND DEADLINE FOR SUBMISSION OF

ASSIGNMENT

23 | P a g e

Paper form submitted to the Secretary, Mrs

Monica Manages. One week from date of
posting.