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Lyt4211-4218/4311-4318 Lytswitch-4 High Power Led Driver Ic Family

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66 views42 pages

Lyt4211-4218/4311-4318 Lytswitch-4 High Power Led Driver Ic Family

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LYT4211-4218/4311-4318

LYTSwitch-4
™
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options

Optimized for Different Applications and Power Levels

Part Number Input Voltage Range TRIAC Dimmable
LYT4211-LYT4218 85-132 VAC No
LYT4311-LYT4318 85-132 VAC Yes

Output Power Table

Click Here
Product Minimum Output Power Maximum Output Power To read about
LYT4x11E 2.5 W 12 W LYTSwitch-4 Low-Line
LYT4x12E 2.5 W 15 W
LYT4x13E 3.8 W 18 W
LYT4x14E 4.5 W 22 W
LYT4x15E 5.5 W 25 W
LYT4x16E 6.8 W 35 W
LYT4x17E 8.0 W 50 W
LYT4x18E 18 W 78 W

LYT4221-4228/4321-4328
LYTSwitch-4
™
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options

Optimized for Different Applications and Power Levels

Part Number Input Voltage Range TRIAC Dimmable
LYT4221-LYT4228 160-300 VAC No
LYT4321-LYT4328 160-300 VAC Yes

Output Power Table

Product Minimum Output Power Maximum Output Power
Click Here
To read about
LYT4x21E 6W 12 W
LYTSwitch-4 High-Line
LYT4x22E 6W 15 W
LYT4x23E 8W 18 W
LYT4x24E 9W 22 W
LYT4x25E 11 W 25 W
LYT4x26E 14 W 35 W
LYT4x27E 19 W 50 W
LYT4x28E 33 W 78 W
This page intentionally left blank
LYT4211-4218/4311-4318
LYTSwitch-4
™
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options

Product Highlights

• Better than ±5% CC regulation

• TRIAC dimmable to less than 5% output
• Fast start-up
• <250 ms at full brightness
• <1s at 10% brightness
AC
• High power factor >0.9 IN
LYTSwitch-4
D V
• Easily meets EN61000-3-2 CONTROL
• Less than 10% THD in optimized designs
BP

• Up to 92% efficient S R FB

• 132 kHz switching frequency for small magnetics

High Performance, Combined Driver, Controller, Switch PI-6800-050913

The LYTSwitch-4 family enables off-line LED drivers with high Figure 1. Typical Schematic.
power factor which easily meet international requirements for
THD and harmonics. Output current is tightly regulated with
better than ±5% CC tolerance1. Efficiency of up to 92% is easily Optimized for Different Applications and Power Levels
achieved in typical applications.
Part Number Input Voltage Range TRIAC Dimmable
Supports a Wide Selection of TRIAC Dimmers
The LYTSwitch-4 family provides excellent turn-on characteristics LYT4211-LYT4218 85-132 VAC No
for leading-edge and trailing-edge TRIAC dimming applications.
LYT4311-LYT4318 85-132 VAC Yes
This results in drivers with a wide dimming range and fast
start-up, even when turning on from a low conduction angle –
large dimming ratio and low “pop-on” current.
Output Power Table1,2
Low Solution Cost and Long Lifetime Product 6 Minimum Output Power 3 Maximum Output Power 4
LYTSwitch-4 ICs are highly integrated and employ a primary-side
control technique that eliminates the optoisolator and reduces LYT4x11E5 2.5 W 12 W
component count. This allows the use of low-cost single-sided LYT4x12E 2.5 W 15 W
printed circuit boards. Combining PFC and CC functions into a
single-stage also helps reduce cost and increase efficiency. LYT4x13E 3.8 W 18 W
The 132 kHz switching frequency permits the use of small,
LYT4x14E 4.5 W 22 W
low-cost magnetics.
LYT4x15E 5.5 W 25 W
LED drivers using the LYTSwitch-4 family do not use primary-
side aluminum electrolytic bulk capacitors. This means greatly LYT4x16E 6.8 W 35 W
extended driver lifetime, especially in bulb and other high
LYT4x17E 8.0 W 50 W
temperature applications.
LYT4x18E 18 W 78 W

Table 1. Output Power Table.

Notes:
1. Performance for typical design. See Application Note.
2. Continuous power in an open-frame design with adequate heat sinking; device
local ambient of 70 °C. Power level calculated assuming a typical LED string
voltage and efficiency >80%.
3. Minimum output power requires CBP = 47 µF.
4. Maximum output power requires CBP = 4.7 µF.
eSIP-7C (E Package) 5. LYT4311 CBP = 47 µF, LYT4211 CBP = 4.7 µF.
6. Package: eSIP-7C (see Figure 2).
Figure 2. Package Options.

www.power.com November 2014

This Product is Covered by Patents and/or Pending Patent Applications.
LYT4211-4218/4311-4318

Topology Isolation Efficiency Cost THD Output Voltage

Isolated Flyback Yes 88% High Best Any
Buck No 92% Low Good Limited
Tapped-Buck No 89% Middle Best Any
Buck-Boost No 90% Low Best High-Voltage

Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design.

Typical Circuit Schematic Key Features

Flyback
Benefits
• Provides isolated output
• Supports widest range of output voltages
• Very good THD performance
AC
Limitations
IN
D V
LYTSwitch-4 • Flyback transformer
CONTROL
BP
• Overall efficiency reduced by parasitic capacitance
S R FB
and inductance in the transformer
• Larger PCB area to meet isolation requirements
PI-6800-050913
• Requires additional components (primary clamp and bias)
• Higher RMS switch and winding currents increases losses
Figure 3a. Typical Isolated Flyback Schematic. and lowers efficiency
Buck
Benefits
• Highest efficiency
• Lowest component count – small size
• Simple low-cost power inductor
• Low drain source voltage stress
AC
IN • Best EMI/lowest component count for filter
D V LYTSwitch-4

CONTROL Limitations
BP
• Single input line voltage range
S R FB
• Output voltage <0.6 × VIN(AC) × 1.41
• Output voltage for low THD designs
PI-6841-111813
• Non-isolated

Figure 3b. Typical Buck Schematic.

Tapped-Buck
Benefits
• Ideal for low output voltage designs (<20 V)
• High efficiency
• Low component count
LYTSwitch-4
• Simple low-cost tapped inductor
AC
IN
D V
Limitations
CONTROL
BP
• Designs best suited for single input line voltage
• Requires additional components (primary clamp)
S R FB
• Non-isolated

PI-6842-111813

Figure 3c. Typical Tapped-Buck Schematic.

Buck-Boost
Benefits
• Ideal for non-isolated high output voltage designs
• High efficiency
• Low component count
• Simple common low-cost power inductor can be used
AC
IN • Lowest THD
D V LYTSwitch-4

CONTROL Limitations
BP
• Maximum VOUT is limited by MOSFET breakdown voltage
S R FB
• Single input line voltage range
• Non-isolated
PI-6859-111813

Figure 3d. Typical Buck-Boost Schematic.

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Rev. E 11/14 www.power.com
LYT4211-4218/4311-4318

DRAIN (D)
BYPASS (BP) 5.9 V
REGULATOR

BYPASS
CAPACITOR SOFT-START
SELECT TIMER HYSTERETIC
THERMAL
SHUTDOWN
FAULT +
ILIM MI PRESENT
AUTO-RESTART 5.9 V -
5.0 V
COUNTER
BYPASS PIN
UNDERVOLTAGE Gate
1V Driver
VOLTAGE SenseFet
MONITOR (V) STOP JITTER
LOGIC CLOCK
Comparator
OSCILLATOR -
LEB
+ FBOFF
3-VT
DCMAX
OCP
OV
LINE
SENSE +

-
CURRENT LIMIT
ILIM
IV COMPARATOR
FEEDBACK (FB) PFC/CC
VBG CONTROL VSENSE
MI
IFB

FBOFF
FEEDBACK
SENSE DCMAX
IS
REFERENCE (R) REFERENCE VBG
BLOCK
6.4 V

PI-6843-071112 SOURCE (S)

Figure 4. Functional Block Diagram.

Pin Functional Description VOLTAGE MONITOR (V) Pin:

This pin interfaces with an external input line peak detector,
DRAIN (D) Pin: consisting of a rectifier, filter capacitor and resistors. The
This pin is the power FET drain connection. It also provides applied current is used to control stop logic for overvoltage (OV),
internal operating current for both start-up and steady-state provide feed-forward to control the output current and the
operation. remote ON/OFF function.

SOURCE (S) Pin:

This pin is the power FET source connection. It is also the
ground reference for the BYPASS, FEEDBACK, REFERENCE
and VOLTAGE MONITOR pins. E Package (eSIP-7C)
(Top View)
BYPASS (BP) Pin:
Exposed Pad
This is the connection point for an external bypass capacitor for (Backside) Internally
the internally generated 5.9 V supply. This pin also provides Connected to
SOURCE Pin (see
output power selection through choice of the BYPASS pin eSIP-7C Package
capacitor value. Drawing)

FEEDBACK (FB) Pin:

The FEEDBACK pin is used for output voltage feedback. The
1R
2V
3 FB
4 BP
5S
7D

current into the FEEDBACK pin is directly proportional to the

output voltage. The FEEDBACK pin also includes circuitry to
protect against open load and overload output conditions.
PI-7076-062513

REFERENCE (R) Pin: Figure 5. Pin Configuration.

This pin is connected to an external precision resistor and is
used to configure for dimming (LYT4311-4318) and non-TRIAC
dimming (LYT4211-4218) modes of operation.

3
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Functional Description For non-dimming or PWM dimming applications with LYT4211-

4218, the external resistor should be a 24.9 kW ±1%. For phase
A LYTSwitch-4 device monolithically combines a controller and angle AC dimming with LYT4311-4318, the external resistor
high-voltage power FET into one package. The controller should be a 49.9 kW ±1%. One percent resistors are
provides both high power factor and constant current output in recommended as the resistor tolerance directly affects the
a single-stage. The LYTSwitch-4 controller consists of an output tolerance. Other resistor values should not be used.
oscillator, feedback (sense and logic) circuit, 5.9 V regulator,
hysteretic over-temperature protection, frequency jittering, BYPASS Pin Capacitor Power Gain Selection
cycle-by-cycle current limit, auto-restart, inductance correction, LYTSwitch-4 devices have the capability to tailor the internal
power factor and constant current control. gain to either full or a reduced output power setting. This allows
selection of a larger device to minimize dissipation for both
FEEDBACK Pin Current Control Characteristics thermal and efficiency reasons. The power gain is selected with
The figure shown below illustrates the operating boundaries of the value of the BYPASS pin capacitor. The full power setting is
the FEEDBACK pin current. Above IFB(SKIP) switching is disabled selected with a 4.7 mF capacitor and the reduced power setting
and below IFB(AR) the device enters into auto-restart. (for higher efficiency) is selected with a 47 mF capacitor. The
BYPASS pin capacitor sets both the internal power gain as well
as the over-current protection (OCP) threshold. Unlike the
IFB(SKIP) Skip-Cycle larger devices, the LYT4x11 power gain is not programmable.
Use a 47 mF capacitor for the LYT4x11.

Switching Frequency
The switching frequency is 132 kHz during normal operation.
To further reduce the EMI level, the switching frequency is
IFB CC Control
Region jittered (frequency modulated) by approximately 2.6 kHz.
During start-up the frequency is 66 kHz to reduce start-up time
when the AC input is phase angle dimmed. Jitter is disabled in
deep dimming.

IFB(DCMAXR) Soft-Start
The controller includes a soft-start timing feature which inhibits
the auto-restart protection feature for the soft-start period (tSOFT )
Soft-Start and
CC Fold-Back to distinguish start-up into a fault (short-circuit) from a large
Region output capacitor. At start-up the LYTSwitch-4 clamps the
maximum duty cycle to reduce the output power. The total
soft-start period is tSOFT.

Remote ON/OFF and EcoSmart™

The VOLTAGE MONITOR pin has a 1 V threshold comparator
connected at its input. This voltage threshold is used for
IFB(AR)
Auto-Restart remote ON/OFF control. When a signal is received at the
DC10 DCMAX VOLTAGE MONITOR pin to disable the output (VOLTAGE
Maximum Duty Cycle MONITOR pin tied to ground through an optocoupler photo-
PI-5433-060410 transistor) the LYTSwitch-4 will complete its current switching
Figure 6. FEEDBACK Pin Current Characteristic. cycle before the internal power FET is forced off.

The FEEDBACK pin current is also used to clamp the maximum The remote ON/OFF feature can also be used as an eco-mode
duty cycle to limit the available output power for overload and or power switch to turn off the LYTSwitch-4 and keep it in a
open-loop conditions. This duty cycle reduction characteristic very low power consumption state for indefinite long periods.
also promotes a monotonic output current start-up characteristic When the LYTSwitch-4 is remotely turned on after entering this
and helps preventing over-shoot. mode, it will initiate a normal start-up sequence with soft-start
the next time the BYPASS pin reaches 5.9 V. In the worst case,
REFERENCE Pin the delay from remote on to start-up can be equal to the full
The REFERENCE pin is tied to ground (SOURCE) via an external discharge/charge cycle time of the BYPASS pin. This reduced
resistor. The value selected sets the internal references, consumption remote off mode can eliminate expensive and
determining the operating mode for dimming (LYT4311-4318) unreliable in-line mechanical switches.
and non-dimming (LYT4211-4218) operation and the line
overvoltage thresholds of the VOLTAGE MONITOR pin.

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completed. Special consideration must be made to appropriately

size the output capacitor to ensure that after the soft-start
period (tSOFT ) the FEEDBACK pin current is above the IFB(AR)
threshold to ensure successful power-supply start-up. After the
D V soft-start time period, auto-restart is activated only when the
CONTROL FEEDBACK pin current falls below IFB(AR).
BP

Over-Current Protection
S R FB The current limit circuit senses the current in the power FET.
When this current exceeds the internal threshold (ILIMIT), the power
FET is turned off for the remainder of that cycle. A leading edge
blanking circuit inhibits the current limit comparator for a short
time (tLEB) after the power FET is turned on. This leading edge
PI-5435-052510
blanking time has been set so that current spikes caused by
capacitance and rectifier reverse recovery will not cause
Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control. premature termination of the power FET conduction.

Line Overvoltage Protection

5.9 V Regulator/Shunt Voltage Clamp This device includes overvoltage detection to limit the maximum
The internal 5.9 V regulator charges the bypass capacitor operating voltage detected through the VOLTAGE MONITOR pin.
connected to the BYPASS pin to 5.9 V by drawing a current An external peak detector consisting of a diode and capacitor is
from the voltage on the DRAIN pin whenever the power FET is required to provide input line peak voltage to the VOLTAGE
off. The BYPASS pin is the internal supply voltage node. When MONITOR pin through a resistor.
the power FET is on, the device operates from the energy stored
in the bypass capacitor. Extremely low power consumption of the The resistor sets line overvoltage (OV) shutdown threshold which,
internal circuitry allows LYTSwitch-4 to operate continuously from once exceeded, forces the LYTSwitch-4 to stop switching. Once
current it takes from the DRAIN pin. A bypass capacitor value the line voltage returns to normal, the device resumes normal
of 47 or 4.7 mF is sufficient for both high frequency decoupling operation. A small amount of hysteresis is provided on the OV
and energy storage. In addition, there is a 6.4 V shunt regulator threshold to prevent noise-generated toggling. When the power
clamping the BYPASS pin at 6.4 V when current is provided to FET is off, the rectified DC high voltage surge capability is
the BYPASS pin through an external resistor. This facilitates increased to the voltage rating of the power FET (725 V), due to the
powering of LYTSwitch-4 externally through a bias winding to absence of the reflected voltage and leakage spikes on the drain.
increase operating efficiency. It is recommended that the
BYPASS pin is supplied current from the bias winding for Hysteretic Thermal Shutdown
normal operation. The thermal shutdown circuitry senses the controller die
temperature. The threshold is set at 142 °C typical with a 75 °C
Auto-Restart hysteresis. When the die temperature rises above this threshold
In the event of an open-loop fault (open FEEDBACK pin resistor (142 °C) the power FET is disabled and remains disabled until
or broken path to feedback winding), output short-circuits or an the die temperature falls by 75 °C, at which point the power FET
overload condition the controller enters into the auto-restart is re-enabled.
mode. The controller annunciates both short-circuit and
open-loop conditions once the FEEDBACK pin current falls Safe Operating Area (SOA) Protection
below the IFB(AR) threshold after the soft-start period. To minimize The device also features a safe operating area (SOA) protection
the power dissipation under this fault condition the shutdown/ mode which disables FET switching for 40 cycles in the event
auto-restart circuit turns the power supply on (same as the the peak switch current reaches the ILIMIT threshold and the switch
soft-start period) and off at an auto-restart duty cycle of on-time is less than tON(SOA). This protection mode protects the
typically DCAR for as long as the fault condition persists. If the device under short-circuited LED conditions and at start-up during
fault is removed during the auto-restart off-time, the power the soft-start period when auto-restart protection is inhibited.
supply will remain in auto-restart until the full off-time count is The SOA protection mode remains active in normal operation.

5
www.power.com Rev. E 11/14
LYT4211-4218/4311-4318

Application Example peak drain voltage of U1 below the 725 V rating of the internal
power FET. Bridge rectifier BR1 rectifies the AC line voltage.
20 W TRIAC Dimmable High Power Factor LED Driver EMI filtering is provided by L1-L3, C1, C4, R2, R24 and R25
Design Example (DER-350) together with the safety rated Y class capacitor (CY1) that bridges
the safety isolation barrier between primary and secondary.
The circuit schematic in Figure 8 shows a TRIAC dimmable high Resistor R2, R24 and R25 act to damp any resonances formed
power factor LED driver based on LYT4317E from the LYTSwitch-4 between L1, L2, L3, C1 and the AC line impedance. A small
family of devices. The design is configurable for non-dimmable bulk capacitor (C4) is required to provide a low impedance
only applications by simple component value changes. It was source for the primary switching current. The maximum value
optimized to drive an LED string at a voltage of 36 V with a of C2 and C4 is limited in order to maintain a power factor of
constant current of 0.7 A ideal for Lumens PAR lamp retro-fit greater than 0.9.
applications. The design operates over an input voltage range
of 90 VAC to 132 VAC. LYTSwitch-4 Primary
To provide peak line voltage information to U1 the incoming
The key goals of this design were compatibility with standard rectified AC peak charges C6 via D2. This is then fed into the
leading edge TRIAC AC dimmers, very wide dimming range VOLTAGE MONITOR pin of U1 as a current via R10. This
(1000:1, 550 mA:0.55 mA), high efficiency (>85%) and high sensed current is also used by the device to set the line input
power factor (>0.9). The design is fully protected from faults overvoltage protection threshold. Resistor R9 provides a
such as no-load (open load), overvoltage and output short- discharge path for C6 with a time constant much longer than
circuit or overload conditions and over temperature. that of the rectified AC to prevent generation of line frequency
ripple.
Circuit Description
The LYTSwitch-4 device (U1- LYT4317E) integrates the power The VOLTAGE MONITOR pin current and the FEEDBACK pin
FET, controller and start-up functions into a single package current are used internally to control the average output LED
reducing the component count versus typical implementations. current. For TRIAC phase-dimming applications a 49.9 kW
Configured as part of an isolated continuous conduction mode resistor (R14) is used on the REFERENCE pin and 2 MW (R10)
flyback converter, U1 provides high power factor via its internal on the VOLTAGE MONITOR pin to provide a linear relationship
control algorithm together with the small input capacitance of between input voltage and the output current and maximizing
the design. Continuous conduction mode operation results in the dimming range.
reduced primary peak and RMS current. This both reduces
EMI noise, allowing simpler, smaller EMI filtering components Diode D3, R15 and C7 clamp the drain voltage to a safe level
and improves efficiency. Output current regulation is maintained due to the effects of leakage inductance. Diode D4 is
without the need for secondary-side sensing which eliminates necessary to prevent reverse current from flowing through U1
current sense resistors and improves efficiency. for the period of the rectified AC input voltage that the voltage
across C4 falls to below the reflected output voltage (VOR).
Input Stage
Fuse F1 provides protection from component failures while RV1
provides a clamp during differential line surges, keeping the

C13
R26 100 pF
30 Ω 200 V
D9 C11 C12
D2 330 µF 330 µF R23 36 V,
DFLU1400-7 DFLU1400 550 mA
12 FL1 63 V 63 V 20 kΩ

R24 D7
47 kΩ R9 C7 BYW29-200
BR1 1/8 W 510 kΩ R15 2.2 nF
MB6S 1/8 W 200 kΩ 630 V 1 FL2
600 V
D6 RTN
BAV21
10

D3 R20 C5 C9
US1J 39 Ω 100 nF 56 µF
1/8 W 50 V 50 V
11
C1 R10
R1 2 MΩ T1
510 220 nF R19
250 V 1% RM8 20 kΩ
1/2 W
1/8 W
C2 C4 C6 D4
100 nF R6 US1D
360 kΩ 100 nF 2.2 µF
250 V 250 V 250 V
R25 R2 L3 D5
47 kΩ L1 47 kΩ L2 5 mH BAV16
1/8 W 1 mH 1/8 W 1 mH R17 D8
R18 BAV21
3 kΩ 165 kΩ
D V 1/10 W 1%
MAZS3300ML

LYTSwitch-4 CONTROL 1/16 W

U1 BP
RV1
33 V
VR4

LYT4317E
F1 140 VAC
5A Q1 Q2
S R FB C15
X0202MA2BL2 MMBT3904
90 - 132 100 nF
VAC C3 R14 50 V
L N 470 nF 49.9 kΩ
50 V 1% C14 R27 R22
R8 10 Ω 1 kΩ
100 Ω 1/16 W C8 10 nF
47 µF 50 V 1/10 W 1/10 W
1W 16 V CY1
470 pF
250 VAC
PI-6875-052213

Figure 8. DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver.

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LYT4211-4218/4311-4318

Diode D6, C5, C9, R19 and R20 create the primary bias supply TRIAC Phase Dimming Control Compatibility
from an auxiliary winding on the transformer. Capacitor C8 The requirement to provide output dimming with low-cost,
provides local decoupling for the BYPASS pin of U1 which is the TRIAC-based, leading edge phase dimmers introduces a
supply pin for the internal controller. During start-up C8 is number of trade-offs in the design.
charged to ~6 V from an internal high-voltage current source
tied to the device DRAIN pin. This allows the part to start Due to the much lower power consumed by LED based lighting
switching at which point the operating supply current is provided the current drawn by the overall lamp is below the holding
from the bias supply via R17. Capacitor C8 also selects the current of the TRIAC within the dimmer. This can cause
output power mode (47 mF for reduced power was selected to undesirable behaviors such as limited dimming range and/or
reduce dissipation in U1 and increase efficiency for this design). flickering as the TRIAC fires inconsistently. The relatively large
impedance the LED lamp presents to the line allows significant
Feedback ringing to occur due to the inrush current charging the input
The bias winding voltage is proportional to the output voltage capacitance when the TRIAC turns on. This too can cause
(set by the turns ratio between the bias and secondary similar undesirable behavior as the ringing may cause the
windings). This allows the output voltage to be monitored TRIAC current to fall to zero and turn off.
without secondary-side feedback components. Resistor R18
converts the bias voltage into a current which is fed into the To overcome these issues simple two circuits, the SCR active
FEEDBACK pin of U1. The internal engine within U1 combines damper and R-C passive bleeder, are incorporated. The
the FEEDBACK pin current, the VOLTAGE MONITOR pin current drawback of these circuits is increased dissipation and
and drain current information to provide a constant output therefore reduced efficiency of the supply. For non-dimming
current over a 1.5:1 output voltage variation (LED string voltage applications these components can simply be omitted.
variation of ±25%) at a fixed line input voltage.
The SCR active damper consists of components R6, C3, and
To limit the output voltage at no-load an output overvoltage Q1 in conjunction with R8. This circuit limits the inrush current
protection circuit is set by D8, C15, R22, VR4, R27, C14 and Q2. that flows to charge C4 when the TRIAC turns on by placing R8
Should the output load be disconnected then the bias voltage in series for the first ~1 ms of the TRIAC conduction. After
will increase until VR4 conducts, turning on Q2 and reducing approximately 1 ms, Q1 turns on and bypasses R8. This keeps
the current into the FEEDBACK pin. When this current drops the power dissipation on R8 low and allows a larger value
below 10 mA the part enters auto-restart and switching is during current limiting. Resistor R6 and C3 provide the delay
disabled for 300 ms allowing time for the output and bias on Q1 turn on after the TRIAC conducts. Diode D9 blocks the
voltages to fall. charge in capacitor C4 from flowing back after the TRIAC turns
on which helps in dimming compatibility especially with high
Output Rectification power dimmers.
The transformer secondary winding is rectified by D7 and
filtered by C11 and C12. An ultrafast TO-220 diode was The passive bleeder circuit is comprised of R1 and C1. This
selected for efficiency and the combined value of C11 and C12 helps keep the input current above the TRIAC holding current
were selected to give peak-to-peak LED ripple current equal to while the input current corresponding to the effective driver
30% of the mean value. For designs where lower ripple is resistance increases during each AC half-cycle.
desirable the output capacitance value can be increased.

A small pre-load is provided by R23 which discharges residual

charge in output capacitors when turned off.

7
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Modified DER-350 20 W High Power Factor LED Driver • For maximum output power column
for Non-Dimmable and Enhanced Line Regulation • Reflected output voltage (VOR) of 65 V
• FEEDBACK pin current of 165 µA
The circuit schematic in Figure 9 shows a high power factor • BYPASS pin capacitor value of 4.7 µF (LYT4x11 = 4.7 µF)
LED driver based on a LYT4317 from the LYTSwitch-4 family of
devices. It was optimized to drive an LED string at a voltage of Note that input line voltages above 85 VAC do not change the
36 V with a constant current of 0.55 A, ideal for high lumen PAR power delivery capability of LYTSwitch-4 devices.
lamp retro-fit applications. The design operates over the
low-line input voltage range of 90 VAC to 132 VAC and is Device Selection
non-dimming application. A non-dimming application has Select the device size by comparing the required output power
tighter output current variation with changes in the line voltage to the values in Table 1. For thermally challenging designs, e.g.,
than a dimming application. It’s key to note that, although not incandescent lamp replacement, where either the ambient
specified for dimming, no circuit damage will result if the end temperature local to the LYTSwitch-4 device is high and/or
user does operate the design with a phase controlled dimmer. there is minimal space for heat sinking use the minimum output
power column. This is selected by using a 47 µF BYPASS pin
Modification for Non-Dimmable Configuration capacitor and results in a lower device current limit and therefore
The design is configurable for non-dimmable application by lower conduction losses. For open frame design or designs
simply removing the component for SCR active damper (R6, where space is available for heat sinking then refer to the
R8, C3, and Q1), blocking diode D9 and R-C bleeder (R1, C1) maximum output power column. This is selected by using a
changes and replacing the reference resistor R14 with 24.9 kW. 4.7 µF BYPASS pin capacitor for all but the LYT4x11 which has
(See Figure 9) only one power setting. In all cases in order to obtain the best
output current tolerance maintain the device temperature below
Key Application Considerations 100 °C

Power Table Maximum Input Capacitance

The data sheet power table (Table 1) represents the minimum To achieve high power factor, the capacitance used in both the
and maximum practical continuous output power based on the EMI filter and for decoupling the rectified AC (bulk capacitor)
following conditions: must be limited in value. The maximum value is a function of
the output power of the design and reduces as the output
• Efficiency of 80% power reduces. For the majority of designs limit the total
• Device local ambient of 70 °C capacitance to less than 200 nF with a bulk capacitor value of
• Sufficient heat sinking to keep the device temperature below 100 nF. Film capacitors are recommended compared to
100 °C ceramic types as they minimize audible noise with operating
• For minimum output power column with leading edge phase dimmers. Start with a value of 10 nF
• Reflected output voltage (VOR) of 120 V for the capacitance in the EMI filter and increase in value until
• FEEDBACK pin current of 135 µA there is sufficient EMI margin.
• BYPASS pin capacitor value of 47 µF

C13
R26 100 pF
30 Ω 200 V
R24 C11 C12
47 kΩ D2 330 µF 330 µF R23 36 V,
1/8 W DFLU1400 63 V 63 V 20 kΩ 550 mA
12 FL1

D7
R9 C7 BYW29-200
BR1 510 kΩ R15 2.2 nF
MB6S 1/8 W 200 kΩ 630 V 1 FL2
600 V
D6 RTN
BAV21
10

D3 R20 C5 C9
US1J 39 Ω 100 nF 56 µF
1/8 W 50 V 50 V
11
R10
2 MΩ T1 R19
1% RM8 20 kΩ
1/8 W
C2 C4 C6 D4
R25 R2 100 nF 100 nF 2.2 µF US1D
47 kΩ L1 47 kΩ L2
1 mH 1/8 W 1 mH 250 V 250 V 250 V
1/8 W L3 D5
5 mH BAV16
R17 D8
R18 BAV21
3 kΩ 165 kΩ
D V 1/10 W 1%
MAZS3300ML

LYTSwitch-4 CONTROL 1/16 W

RV1 U1 BP
33 V
VR4

140 VAC LYT4317E

F1
5A Q2
S R FB C15
MMBT3904
90 - 132 100 nF
VAC R14 50 V
L N 24.9 kΩ
1% C14 R27 R22
1/16 W C8 10 nF 10 Ω 1 kΩ
47 µF 50 V 1/10 W 1/10 W
16 V CY1
470 pF
250 VAC
PI-6875a-052213

Figure 9. Modified Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver.

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REFERENCE Pin Resistance Value Selection Operation with Phase Controlled Dimmers
The LYTSwitch-4 family contains phase dimming devices, Dimmer switches control incandescent lamp brightness by not
LYT4311-4318, and non-dimming devices, LYT4211-4218. The conducting (blanking) for a portion of the AC voltage sine wave.
non-dimmable devices use a 24.9 kΩ ±1% REFERENCE pin This reduces the RMS voltage applied to the lamp thus reducing
resistor for best output current tolerance (over AC input voltage the brightness. This is called natural dimming and the LYTSwitch-4
changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 kΩ LYT4311-4318 devices when configured for dimming utilize
±1% to achieve the widest dimming range. natural dimming by reducing the LED current as the RMS line
voltage decreases. By this nature, line regulation performance is
VOLTAGE MONITOR Pin Resistance Network Selection purposely decreased to increase the dimming range and more
For widest AC phase angle dimming range with LYT4311-4318, closely mimic the operation of an incandescent lamp. Using a
use a 2 MΩ (1.7 MΩ for 100 VAC (Japan)) resistor connected to 49.9 kW REFERENCE pin resistance selects natural dimming
the line voltage peak detector circuit. Make sure that the mode operation.
resistor’s voltage rating is sufficient for the peak line voltage. If
necessary use multiple series connected resistors. Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with low-
Primary Clamp and Output Reflected Voltage VOR cost, TRIAC-based, leading edge phase dimmers introduces a
A primary clamp is necessary to limit the peak drain to source number of trade-offs in the design.
voltage. A Zener clamp requires the fewest components and
board space and gives the highest efficiency. RCD clamps are Due to the much lower power consumed by LED based lighting
also acceptable however the peak drain voltage should be the current drawn by the overall lamp is below the holding
carefully verified during start-up and output short-circuits as the current of the TRIAC within the dimmer. This causes
clamping voltage varies with significantly with the peak drain undesirable behaviors such as limited dimming range and/or
current. flickering. The relatively large impedance the LED lamp presents
to the line allows significant ringing to occur due to the inrush
For the highest efficiency, the clamping voltage should be current charging the input capacitance when the TRIAC turns
selected to be at least 1.5 times the output reflected voltage, on. This too can cause similar undesirable behavior as the
VOR, as this keeps the leakage spike conduction time short. ringing may cause the TRIAC current to fall to zero and turn off.
This will ensure efficient operation of the clamp circuit and will
also keep the maximum drain voltage below the rated To overcome these issues two circuits, the active damper and
breakdown voltage of the FET. An RCD (or RCDZ) clamp passive bleeder, are incorporated. The drawback of these
provides tighter clamp voltage tolerance than a Zener clamp. circuits is increased dissipation and therefore reduced efficiency
The RCD clamp is more cost effective than the Zener clamp but of the supply so for non-dimming applications these components
requires more careful design to ensure that the maximum drain can simply be omitted.
voltage does not exceed the power FET breakdown voltage.
These VOR limits are based on the BVDSS rating of the internal Figure 10a shows the line voltage and current at the input of a
FET, a VOR of 60 V to 100 V is typical for most designs, giving leading edge TRIAC dimmer with Figure 10b showing the
the best PFC and regulation performance. resultant rectified bus voltage. In this example, the TRIAC
conducts at 90 degrees.
Series Drain Diode
An ultrafast or Schottky diode in series with the drain is 350
PI-5983-060810
0.35

Line Current (Through Dimmer) (A)

Line Voltage (at Dimmer Input) (V)

necessary to prevent reverse current flowing through the Voltage

device. The voltage rating must exceed the output reflected 250 Current
0.25
voltage, VOR. The current rating should exceed two times the 150 0.15
average primary current and have a peak rating equal to the
maximum drain current of the selected LYTSwitch-4 device. 50 0.05

Line Voltage Peak Detector Circuit -50 0.5 50 100 150 200 250 300 350 400
-0.05
LYTSwitch-4 devices use the peak line voltage to regulate the -150 -0.15
power delivery to the output. A capacitor value of 1 mF to 4.7 mF
is recommended to minimize line ripple and give the highest -250 -0.25
power factor (>0.9), smaller values are acceptable but result in
-350 -0.35
lower PF and higher line current distortion.
Conduction Angle (°)

Figure 10a. Ideal Input Voltage and Current Waveform for a Leading Edge
TRIAC Dimmer at 90°.

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PI-5984-060810 PI-5986-060810
350 0.35 350 0.35
Voltage Voltage

Dimmer Output Current (A)

Dimmer Output Voltage (V)
Rectified Input Current (A)
300 0.3 250 0.25
Rectified Input Voltage (V)

Current Current

250 0.25 150 0.15

200 0.2 50 0.05

0 50 100 150 200 250 300 350

150 0.15 -50 -0.05

100 0.1 -150 -0.15

50 0.05 -250 -0.25

0 0 -350 -0.35
0 50 100 150 200 250 300 350 400
Conduction Angle (°)
Conduction Angle (°)
Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output. Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing
Edge Dimmer at 90° Conduction Angle.
Figure 11 shows undesired rectified bus voltage and current
with the TRIAC turning off prematurely and restarting. Start by adding a bleeder circuit. Add a 0.44 µF capacitor and
510 W 1 W resistor (components in series) across the rectified
If the TRIAC is turning off before the end of the half-cycle bus (C1 and R1 in Figure 8). If the results in satisfactory operation
erratically or alternate half AC cycles have different conduction reduce the capacitor value to the smallest that result in acceptable
angles then flicker will be observed in the LED light due to performance to reduce losses and increase efficiency.
variations in the output current. This can be solved by including
a bleeder and damper circuit. If the bleeder circuit does not maintain conduction in the TRIAC,
then add an active damper as shown in Figure 8. This consists
Dimmers will behave differently based on manufacturer and of components R6, C3, and Q1 in conjunction with R8. This
power rating, for example a 300 W dimmer requires less circuit limits the inrush current that flows to charge C4 when the
dampening and requires less power loss in the bleeder than a TRIAC turns on by placing R8 in series for the first 1 ms of the
600 W or 1000 W dimmer due to different drive circuits and TRIAC conduction. After approximately 1 ms, Q1 turns on and
TRIAC holding current specifications. Multiple lamps in parallel shorts R8. This keeps the power dissipation on R8 low and
driven from the same dimmer can introduce more ringing due to allows a larger value to be used during current limiting.
the increased capacitance of parallel units. Therefore, when Increasing the delay before Q1 turns on by increasing the value
testing dimmer operation verify on a number of models, of resistor R6 will improve dimmer compatibility but cause more
different line voltages and with both a single driver and multiple power to be dissipated across R8. Monitor the AC line current
drivers in parallel. and voltage at the input of the power supply as you make the
adjustments. Increase the delay until the TRIAC operates
350
PI-5985-060810
0.35 properly but keep the delay as short as possible for efficiency.
Voltage
300 0.3
Rectified Input Current (A)

As a general rule the greater the power dissipated in the bleeder

Rectified Input Voltage (V)

Current

250 0.25
and damper circuits, the more types of dimmers will work with
the driver.
200 0.2
Trailing Edge Phase Controlled Dimmers
150 0.15 Figure 11 shows the line voltage and current at the input of the
100 0.1
power supply with a trailing edge dimmer. In this example, the
dimmer conducts at 90 degrees. Many of these dimmers use
50 0.05 back-to-back connected power FETs rather than a TRIAC to
control the load. This eliminates the holding current issue of
0 0
0 50 100 150 200 250 300 350 400
TRIACs and since the conduction begins at the zero crossing,
high current surges and line ringing are minimized. Typically these
Conduction Angle (°) types of dimmers do not require damping and bleeder circuits.
Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.

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Audible Noise Considerations for Use with lifetime. For every 10 °C rise in temperature, component life is
Leading Edge Dimmers reduced by a factor of 2. Therefore it is important to properly
Noise created when dimming is typically created by the input heat sink and to verify the operating temperatures of all devices.
capacitors, EMI filter inductors and the transformer. The input
capacitors and inductors experience high di/dt and dv/dt every Layout Considerations
AC half-cycle as the TRIAC fires and an inrush current flows to
charge the input capacitance. Noise can be minimized by Primary-Side Connections
selecting film vs. ceramic capacitors, minimizing the capacitor Use a single point (Kelvin) connection at the negative terminal of
value and selecting inductors that are physically short and wide. the input filter capacitor for the SOURCE pin and bias returns.
This improves surge capabilities by returning surge currents
The transformer may also create noise which can be minimized from the bias winding directly to the input filter capacitor. The
by avoiding cores with long narrow legs (high mechanical BYPASS pin capacitor should be located as close to the
resonant frequency). For example, RM cores produce less BYPASS pin and connected as close to the SOURCE pin as
audible noise than EE cores for the same flux density. Reducing possible. The SOURCE pin trace should not be shared with the
the core flux density will also reduce the noise. Reducing the main power FET switching currents. All FEEDBACK pin
maximum flux density (BM) to 1500 Gauss usually eliminates components that connect to the SOURCE pin should follow the
any audible noise but must be balanced with the increased core same rules as the BYPASS pin capacitor. It is critical that the
size needed for a given output power. main power FET switching currents return to the bulk capacitor
with the shortest path as possible. Long high current paths
Thermal and Lifetime Considerations create excessive conducted and radiated noise.
Lighting applications present thermal challenges to the driver.
In many cases the LED load dissipation determines the working Secondary-Side Connections
ambient temperature experienced by the drive so thermal The output rectifier and output filter capacitor should be as
evaluation should be performed with the driver inside the final close as possible. The transformer’s output return pin should
enclosure. Temperature has a direct impact on driver and LED have a short trace to the return side of the output filter capacitor.

BYPASS Pin
LYT4317E Capacitor Clamp Transformer Output
Input EMI Filter Diode
Bullk
Capacitor

Output
Capacitor

REFERENCE Pin
Resistor

FEEDBACK Pin
Resistor Output
VOLTAGE MONITOR Pin Capacitors
Resistor
PI-6904-072313

Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer.

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Quick Design Checklist

Maximum Drain Voltage

Verify that the peak VDS does not exceed 725 V under all
operating conditions including start-up and fault conditions.

Maximum Drain Current

Measure the peak drain current under all operation conditions
including start-up and fault conditions. Look for signs of
transformer saturation (usually occurs at highest operating
ambient temperatures). Verify that the peak current is less than
the stated Absolute Maximum Rating in the data sheet.

Thermal Check
At maximum output power, both minimum and maximum line
voltage and ambient temperature; verify that temperature
specifications are not exceeded for the LYTSwitch-4,
transformer, output diodes, output capacitors and drain clamp
components.

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Absolute Maximum Ratings(1,4)

DRAIN Pin Peak Current(5): LYT4x11..................................1.37 A Operating Junction Temperature(2)..........................-40 to 150 °C
LYT4x12..................................2.08 A
LYT4x13..................................2.72 A Notes:
LYT4x14................................. 4.08 A 1. All voltages referenced to SOURCE, TA = 65 °C.
LYT4x15................................. 5.44 A 2. Normally limited by internal circuitry.
LYT4x16................................. 6.88 A 3. 1/16 in. from case for 5 seconds.
LYT4x17.................................. 7.73 A 4. Absolute Maximum Ratings specified may be applied, one
LYT4x18................................. 9.00 A at a time without causing permanent damage to the
DRAIN Pin Voltage ……………………….................. -0.3 to 725 V product. Exposure to Absolute Maximum Ratings for
BYPASS Pin Voltage.................................................. -0.3 to 9 V extended periods of time may affect product reliability.
BYPASS Pin Current ………………………....................... 100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is
VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6) simultaneously less than 400 V. See also Figure 13.
FEEDBACK Pin Voltage ……..................................... -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins
REFERENCE Pin Voltage .......................................... -0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can
Lead Temperature(3) .........................................................260 °C safely rise to 15 V without damage.
Storage Temperature ………………….................... -65 to 150 °C

Thermal Resistance

Thermal Resistance: E Package Notes:

(qJA) ....................................................105 °C/W(1) 1. Free standing with no heat sink.

(qJC)..................................................... 2 °C/W(2) 2. Measured at back surface tab.

Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)
Control Functions
Average 124 132 140
Switching Frequency fOSC TJ = 65 °C kHz
Peak-Peak Jitter 5.4
Frequency Jitter TJ = 65 °C
fM 2.6 kHz
Modulation Rate See Note B
LYT4x11 -4.1 -3.4 -2.7

VBP = 0 V, LYT4x12 -7.3 -6.1 -4.9

ICH1
TJ = 65 °C LYT4x13-4x17 -12 -9.5 -7.0

BYPASS Pin LYT4x18 -13.3 -10.8 -8.3

mA
Charge Current LYT4x11 -0.85 -0.62 -0.43

VBP = 5 V, LYT4x12 -3.5 -2.4 -1.7

ICH2
TJ = 65 °C LYT4x13-4x17 -6.5 -4.35 -3.1

LYT4x18 -7.5 -5.5 -4.25

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)

Control Functions (cont.)

0 °C < TJ < 100 °C
ICD2 0.5 0.8 1.2
FET Not Switching
Drain Supply Current mA
0 °C < TJ < 100 °C
ICD1 1 2.5 4
FET Switching at fOSC
VOLTAGE MONITOR Pin
TJ = 65 °C Threshold 115 123 131
Line Overvoltage
IOV RR = 24.9 kW mA
Threshold RR = 49.9 kW Hysteresis 6
VOLTAGE MONITOR 0 °C < TJ < 100 °C
VV 2.75 3.0 3.25 V
Pin Voltage IV < IOV
VOLTAGE MONITOR Pin VV = 5 V
IV(SC) 165 185 205 mA
Short-Circuit Current TJ = 65 °C
Remote ON/OFF
VV(REM) TJ = 65 °C 0.5 V
Threshold
FEEDBACK Pin
FEEDBACK Pin Current
at Onset of Maximum IFB(DCMAXR) 0 °C < TJ < 100 °C 90 mA
Duty Cycle
FEEDBACK Pin Current
IFB(SKIP) 0 °C < TJ < 100 °C 210 mA
Skip Cycle Threshold
IFB(DCMAXR) < IFB < IFB(SKIP)
Maximum Duty Cycle DCMAX 90 99.9 %
0 °C < TJ < 100 °C
IFB = 150 mA
FEEDBACK Pin Voltage VFB 2.1 2.3 2.56 V
0 °C < TJ < 100 °C
FEEDBACK Pin VFB = 5 V
IFB(SC) 320 400 480 mA
Short-Circuit Current TJ = 65 °C
DC10 IFB = IFB(AR), TJ = 65 °C, See Note B 17

Duty Cycle Reduction DC40 IFB = 40 mA, TJ = 65 °C 34 %

DC60 IFB = 60 mA, TJ = 65 °C 55

Auto-Restart
TJ = 65 °C
Auto-Restart ON-Time tAR 55 76 ms
VBP = 5.9 V
Auto-Restart TJ = 65 °C
DCAR 25 %
Duty Cycle See Note B
SOA Minimum Switch TJ = 65 °C
tON(SOA) 0.875 ms
ON-Time See Note B
FEEDBACK Pin Current
IFB(AR) 0 °C < TJ < 100 °C 6.5 10 mA
During Auto-Restart

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)
REFERENCE Pin
REFERENCE Pin
VR 1.223 1.245 1.273 V
Voltage RR = 24.9 kW
REFERENCE Pin 0 °C < TJ < 100 °C
IR 48.69 49.94 51.19 mA
Current
Current Limit/Circuit Protection
di/dt = 174 mA/ms LYT4x12 1.00 1.17

di/dt = 174 mA/ms LYT4x13 1.24 1.44

Full Power ILIMIT(F) di/dt = 225 mA/ms LYT4x14 1.46 1.70
Current Limit A
(CBP = 4.7 mF) TJ = 65 °C di/dt = 320 mA/ms LYT4x15 1.76 2.04

di/dt = 350 mA/ms LYT4x16 2.43 2.83

di/dt = 426 mA/ms LYT4x17 3.26 3.79
di/dt = 133 mA/ms LYT4x11 0.74 0.86

di/dt = 195 mA/ms LYT4x12 0.81 0.95

di/dt = 192 mA/ms LYT4x13 1.00 1.16

Reduced Power ILIMIT(R) di/dt = 240 mA/ms LYT4x14 1.19 1.38
Current Limit A
(CBP = 47 mF) TJ = 65 °C di/dt = 335 mA/ms LYT4x15 1.43 1.66

di/dt = 380 mA/ms LYT4x16 1.76 2.05

di/dt = 483 mA/ms LYT4x17 2.35 2.73

di/dt = 930 mA/ms LYT4x18 4.90 5.70

Minimum ON-Time
tLEB + tIL(D) TJ = 65 °C 300 500 700 ns
Pulse
Leading Edge TJ = 65 °C
tLEB 150 500 ns
Blanking Time See Note B
TJ = 65 °C
Current Limit Delay tIL(D) 150 ns
See Note B
Thermal Shutdown
See Note B 147 155 164 °C
Temperature
Thermal Shutdown
See Note B 56 °C
Hysteresis
BYPASS Pin Power-Up
Reset Threshold VBP(RESET) 0 °C < TJ < 100 °C 2.25 3.30 4.25 V
Voltage

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)
Output

LYT4x11 TJ = 65 °C 11.5 13.2

ID = 100 mA TJ = 100 °C 13.5 15.5

LYT4x12 TJ = 65 °C 6.9 8.0

ID = 100 mA TJ = 100 °C 8.4 9.7

LYT4x13 TJ = 65 °C 5.3 6.0

ID = 150 mA TJ = 100 °C 6.3 7.3

LYT4x14 TJ = 65 °C 3.4 3.9

ID = 150 mA TJ = 100 °C 3.9 4.5
ON-State Resistance RDS(ON) W
LYT4x15 TJ = 65 °C 2.5 2.9
ID = 200 mA TJ = 100 °C 3.0 3.4

LYT4x16 TJ = 65 °C 1.9 2.2

ID = 250 mA TJ = 100 °C 2.3 2.7

LYT4x17 TJ = 65 °C 1.7 2.0

ID = 350 mA TJ = 100 °C 2.0 2.4

LYT4x18 TJ = 65 °C 1.3 1.5

ID = 600 mA TJ = 100 °C 1.6 1.8

VBP = 6.4 V
OFF-State Drain
IDSS VDS = 560 V 50 mA
Leakage Current
TJ = 100 °C

VBP = 6.4 V
Breakdown Voltage BVDSS 725 V
TJ = 65 °C

Minimum Drain
TJ < 100 °C 36 V
Supply Voltage

Rise Time tR Measured in a Typical Flyback 100 V

Fall Time tF See Note B 50 ns

NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing
temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature.
B. Guaranteed by characterization. Not tested in production.

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Typical Performance Characteristics

10000 300

PI-6715-072313

PI-6716-071012
Scaling Factors: Scaling Factors:
LYT4x11 0.18 LYT4x11 0.18
LYT4x12 0.28
DRAIN Capacitance (pF)

LYT4x12 0.28
LYT4x13 0.38 LYT4x13 0.38
LYT4x14 0.56 LYT4x14 0.56
1000 LYT4x15 0.75 200 LYT4x15 0.75

Power (mW)
LYT4x16 1.00 LYT4x16 1.00
LYT4x17 1.16 LYT4x17 1.16
LYT4x18 1.55 LYT4x18 1.55

100 100

10 0
1 100 200 300 400 500 600
0 100 200 300 400 500 600 700
DRAIN Pin Voltage (V) DRAIN Voltage (V)
Figure 14. Drain Capacitance vs. Drain Pin Voltage. Figure 15. Power vs. Drain Voltage.

(Normalized to Absolute Maximum Rating)

5 1.2
PI-6717-071012

PI-6909-110512
4 1
DRAIN Current (A)

DRAIN Current

0.8
3 Scaling Factors:
LYT4x11 0.18
LYT4x12 0.28 0.6
2 LYT4x13 0.38
LYT4x14 0.56
LYT4x15 0.75 0.4
LYT4x16 1.00
1 LYT4x17 1.16
LYT4x18 1.55 0.2
LYT4x28 TCASE = 25 °C
LYT4x28 TCASE = 100 °C
0 0
0 2 4 6 8 10 12 14 16 18 20 0 100 200 300 400 500 600 700 800
DRAIN Voltage (V) DRAIN Voltage (V)
Figure 16. Drain Current vs. Drain Voltage. Figure 17. Maximum Allowable Drain Current vs. Drain Voltage.

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eSIP-7C (E Package)

2
0.403 (10.24) C
0.397 (10.08) 0.264 (6.70)
A 0.081 (2.06) Ref.
0.077 (1.96)
B

Detail A
2
0.325 (8.25) 0.290 (7.37)
Ref. 0.198 (5.04) Ref.
0.320 (8.13)
0.519 (13.18)
Ref.

Pin #1 0.207 (5.26)

0.140 (3.56) 0.016 (0.41)
I.D. 0.187 (4.75)
0.120 (3.05) Ref.

0.070 (1.78) Ref. 0.047 (1.19) 3 4

0.033 (0.84)
0.050 (1.27) 0.100 (2.54) 6×
3 0.016 (0.41) 6×
0.028 (0.71)
0.011 (0.28) 0.118 (3.00)
0.010 M 0.25 M C A B
0.020 M 0.51 M C
FRONT VIEW SIDE VIEW BACK VIEW

10° Ref. 0.100 (2.54)

All Around 0.021 (0.53)
0.019 (0.48)
0.060 (1.52) 0.020 (0.50) 0.050 (1.27)
Ref. 0.050 (1.27)
PIN 1

0.048 (1.22) 0.059 (1.50) 0.155 (3.93)

0.378 (9.60) 0.046 (1.17)
Ref. 0.019 (0.48) Ref.
0.023 (0.58)
PIN 7
END VIEW
0.027 (0.70)
0.059 (1.50)
DETAIL A
Notes:
0.100 (2.54) 0.100 (2.54)
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost extremes of the plastic MOUNTING HOLE PATTERN
body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but (not to scale)
including any mismatch between the top and bottom of the plastic body.
Maximum mold protrusion is 0.007 [0.18] per side.
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Controlling dimensions in inches (mm).
PI-4917-020515

Part Ordering Information

• LYTSwitch-4 Product Family
• 4 Series Number
• PFC/Dimming
2 PFC No Dimming
3 PFC Dimming
• Voltage Range
1 Low-Line
• Device Size
• Package Identifier
LYT 4 2 1 3 E E eSIP-7C

18
Rev. E 11/14 www.power.com
LYT4211-4218/4311-4318

Revision Notes Date

A Initial Release. 11/12
B Corrected Min and Typ parameter table values on pages 13 and 14. 02/13
B Updated parameters ICH1, ICH2, ICD1, DCAR, ILIMIT(F), ILIMIT(R), on pages 13, 14 and 15. 02/20/13
C Updated figures 1, 3a, 3b, 3c, 3d, 8, 9 and 13. 06/13
D Added Note 6 to Absolute Maximum Ratings section. 10/13
E Removed L pin parts, updated ICH2, BVDSS, Thermal Shutdown Temperature and Hysteresis parameters per PCN-14441. 11/11/14

19
www.power.com Rev. E 11/14
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD
PARTY RIGHTS.

Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be
covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power
Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers
a license under certain patent rights as set forth at http://www.power.com/ip.htm.

Life Support Policy

POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in
significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero,
HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are
trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.

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e-mail: [email protected]
LYT4221-4228/4321-4328
LYTSwitch-4
™
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options

Product Highlights

• Better than ±5% CC regulation

• Up to 92% efficient S R FB
• 132 kHz switching frequency for small magnetics

High Performance, Combined Driver, Controller, Switch PI-6800-050913

The LYTSwitch-4 family enables off-line LED drivers with high Figure 1. Typical Schematic.
power factor which easily meet international requirements for
THD and harmonics. Output current is tightly regulated with
better than ±5% CC tolerance1. Efficiency of up to 92% is easily Optimized for Different Applications and Power Levels
achieved in typical applications.
Part Number Input Voltage Range TRIAC Dimmable
Supports a Wide Selection of TRIAC Dimmers
The LYTSwitch-4 family provides excellent turn-on characteristics LYT4221-LYT4228 160-308 VAC No
for leading-edge and trailing-edge TRIAC dimming applications.
LYT4321-LYT4328 160-308 VAC Yes
This results in drivers with a wide dimming range and fast
start-up, even when turning on from a low conduction angle –
large dimming ratio and low “pop-on” current.
Output Power Table1,2
Low Solution Cost and Long Lifetime Product 6 Minimum Output Power 3 Maximum Output Power 4
LYTSwitch-4 ICs are highly integrated and employ a primary-side
control technique that eliminates the optoisolator and reduces LYT4x21E5 6W 12 W
component count. This allows the use of low-cost single-sided LYT4x22E 6W 15 W
printed circuit boards. Combining PFC and CC functions into a
single-stage also helps reduce cost and increase efficiency. LYT4x23E 8W 18 W
The 132 kHz switching frequency permits the use of small,
LYT4x24E 9W 22 W
low-cost magnetics.
LYT4x25E 11 W 25 W
LED drivers using the LYTSwitch-4 family do not use primary-
side aluminum electrolytic bulk capacitors. This means greatly LYT4x26E 14 W 35 W
extended driver lifetime, especially in bulb and other high
LYT4x27E 19 W 50 W
temperature applications.
LYT4x28E 33 W 78 W

Table 1. Output Power Table.

Notes:
1. Performance for typical design. See Application Note.
2. Continuous power in an open frame design with adequate heat sinking; device
local ambient of 70 °C. Power level calculated assuming a typical LED string
voltage and efficiency >80%.
3. Minimum output power requires CBP = 47 µF.
4. Maximum output power requires CBP = 4.7 µF.
eSIP-7C (E Package) 5. LYT4321 CBP = 47 µF, LYT4221 CBP = 4.7 µF.
6. Package: eSIP-7C (see Figure 2).
Figure 2. Package Options.

www.power.com November 2014

This Product is Covered by Patents and/or Pending Patent Applications.
LYT4221-4228/4321-4328

Topology Isolation Efficiency Cost THD Output Voltage

Isolated Flyback Yes 88% High Best Any
Buck No 92% Low Good Limited
Tapped Buck No 89% Middle Best Any
Buck-Boost No 90% Low Best High-Voltage

Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design.

Typical Circuit Schematic Key Features

Flyback
Benefits
• Provides isolated output
• Supports widest range of output voltages
• Very good THD performance
Limitations

AC
IN • Flyback transformer
D V
LYTSwitch-4

CONTROL
• Overall efficiency reduced by parasitic capacitance
and inductance in the transformer
BP

S R FB • Larger PCB area to meet isolation requirements

• Requires additional components (primary clamp and bias)
PI-6800-050913 • Higher RMS switch and winding currents increases losses
Figure 3a. Typical Isolated Flyback Schematic. and lowers efficiency

Buck
Benefits
• Highest efficiency
• Lowest component count – small size
• Simple low-cost power inductor
• Low drain source voltage stress
AC
IN • Best EMI/lowest component count for filter
LYTSwitch-4
D V
CONTROL
Limitations
• Single input line voltage range
BP

S R FB
• Output voltage <0.6 × VIN(AC) × 1.41
• Output voltage for low THD designs
PI-6841-111813
• Non-isolated
Figure 3b. Typical Buck Schematic.

Tapped Buck
Benefits
• Ideal for low output voltage designs (<20 V)
• High efficiency
• Low component count
• Simple low-cost tapped inductor
AC
IN
LYTSwitch-4
Limitations
• Designs best suited for single input line voltage
D V
CONTROL

• Requires additional components (primary clamp)

S R FB
• Non-isolated

PI-6842-111813

Figure 3c. Typical Tapped Buck Schematic.

Buck-Boost
Benefits
• Ideal for non-isolated high output voltage designs
• High efficiency
• Low component count
• Simple common low-cost power inductor can be used
• Lowest THD
AC
IN
LYTSwitch-4
Limitations
D V
CONTROL

• Maximum VOUT is limited by MOSFET breakdown voltage

S R FB
• Single input line voltage range
• Non-isolated
PI-6859-111813

Figure 3d. Typical Buck-Boost Schematic.

2
Rev. C 11/14 www.power.com
LYT4221-4228/4321-4328

DRAIN (D)
BYPASS (BP) 5.9 V
REGULATOR

-
CURRENT LIMIT
ILIM
IV COMPARATOR
FEEDBACK (FB) PFC/CC
VBG CONTROL VSENSE
MI
IFB

FBOFF
FEEDBACK
SENSE DCMAX
IS
REFERENCE (R) REFERENCE VBG
BLOCK
6.4 V

PI-6843-071112 SOURCE (S)

Figure 4. Functional Block Diagram.

Pin Functional Description VOLTAGE MONITOR (V) Pin:

SOURCE (S) Pin:

This pin is the power FET source connection. It is also the
ground reference for the BYPASS, FEEDBACK, REFERENCE
and VOLTAGE MONITOR pins. E Package (eSIP-7C)
(Top View)
BYPASS (BP) Pin:
Exposed Pad
This is the connection point for an external bypass capacitor for (Backside) Internally
the internally generated 5.9 V supply. This pin also provides Connected to
output power selection through choice of the BYPASS pin SOURCE Pin (see
eSIP-7C Package
capacitor value. Drawing)

FEEDBACK (FB) Pin:

The FEEDBACK pin is used for output voltage feedback. The
current into the FEEDBACK pin is directly proportional to the
1R
2V
3 FB
4 BP
5S
7D

output voltage. The FEEDBACK pin also includes circuitry to

protect against open load and overload output conditions.
PI-7076-062513

REFERENCE (R) Pin: Figure 5. Pin Configuration.

This pin is connected to an external precision resistor and is
configured to use only 24.9 kW for non-dimming and dimming.

3
www.power.com Rev. C 11/14
LYT4221-4228/4321-4328

Functional Description BYPASS Pin Capacitor Power Gain Selection

LYTSwitch-4 devices have the capability to tailor the internal
A LYTSwitch-4 device monolithically combines a controller and gain to either full or a reduced output power setting. This allows
high-voltage power FET into one package. The controller selection of a larger device to minimize dissipation for both
provides both high power factor and constant current output in thermal and efficiency reasons. The power gain is selected with
a single-stage. The LYTSwitch-4 controller consists of an the value of the BYPASS pin capacitor. The full power setting is
oscillator, feedback (sense and logic) circuit, 5.9 V regulator, selected with a 4.7 mF capacitor and the reduced power setting
hysteretic over-temperature protection, frequency jittering, (for higher efficiency) is selected with a 47 mF capacitor. The
cycle-by-cycle current limit, auto-restart, inductance correction, BYPASS pin capacitor sets both the internal power gain as well
power factor and constant current control. as the over-current protection (OCP) threshold. Unlike the
larger devices, the LYT4x21 power gain is not programmable.
FEEDBACK Pin Current Control Characteristics Use a 47 mF capacitor for the LYT4x21.
The figure shown below illustrates the operating boundaries of
the FEEDBACK pin current. Above IFB(SKIP) switching is disabled Switching Frequency
and below IFB(AR) the device enters into auto-restart. The switching frequency is 132 kHz during normal operation.
To further reduce the EMI level, the switching frequency is
jittered (frequency modulated) by approximately 5.4 kHz.
IFB(SKIP) Skip-Cycle During start-up the frequency is 66 kHz to reduce start-up time
when the AC input is phase angle dimmed. Jitter is disabled in
deep dimming.

Soft-Start
The controller includes a soft-start timing feature which inhibits
IFB CC Control
Region the auto-restart protection feature for the soft-start period (tSOFT )
to distinguish start-up into a fault (short-circuit) from a large
output capacitor. At start-up the LYTSwitch-4 clamps the
maximum duty cycle to reduce the output power. The total
soft-start period is tSOFT.
IFB(DCMAXR)
Remote ON/OFF and EcoSmart™
The VOLTAGE MONITOR pin has a 1 V threshold comparator
Soft-Start connected at its input. This voltage threshold is used for
Region remote ON/OFF control. When a signal is received at the
VOLTAGE MONITOR pin to disable the output (VOLTAGE
MONITOR pin tied to ground through an optocoupler photo-
transistor) the LYTSwitch-4 will complete its current switching
cycle before the internal power FET is forced off.

IFB(AR)
The remote ON/OFF feature can also be used as an eco-mode
Auto-Restart or power switch to turn off the LYTSwitch-4 and keep it in a
DC10 DCMAX very low power consumption state for indefinite long periods.
Maximum Duty Cycle When the LYTSwitch-4 is remotely turned on after entering this
PI-6978-040213 mode, it will initiate a normal start-up sequence with soft-start
Figure 6. FEEDBACK Pin Current Characteristic.
the next time the BYPASS pin reaches 5.9 V. In the worst case,
the delay from remote on to start-up can be equal to the full
The FEEDBACK pin current is also used to clamp the maximum discharge/charge cycle time of the BYPASS pin. This reduced
duty cycle to limit the available output power for overload and consumption remote off mode can eliminate expensive and
open-loop conditions. This duty cycle reduction characteristic unreliable in-line mechanical switches.
also promotes a monotonic output current start-up characteristic
and helps preventing over-shoot.

REFERENCE Pin
The REFERENCE pin is tied to ground (SOURCE) via an external
resistor. The value selected sets the internal references and it
should be 24.9 kΩ ±1%. One percent resistors are recommended
as the resistor tolerance directly affects the output tolerance.
Other resistor values should not be used.

4
Rev. C 11/14 www.power.com
LYT4221-4228/4321-4328

completed. Special consideration must be made to appropriately

Line Overvoltage Protection

5
www.power.com Rev. C 11/14
LYT4221-4228/4321-4328

Application Example Input Stage

Fuse F1 provides protection from component failures while RV1
20 W TRIAC Dimmable High Power Factor LED Driver provides a clamp during differential line surges, keeping the
Design Example (DER-396) peak drain voltage of U1 below the device absolute maximum
rating of the internal power FET. Bridge rectifier BR1 rectifies
The circuit schematic in Figure 8 shows a TRIAC dimmable high the AC line voltage. EMI filtering is provided by L1, L2, C4, C5,
power factor LED driver based on LYT4324E from the LYTSwitch-4 R3 and R12 together with the safety rated Y class capacitor
high-line family of devices. The design is configurable for non- (CY1) that bridges the safety isolation barrier between primary
dimmable only applications by simply changing the device to a and secondary. Resistor R3 and R12 damp any resonances
non-dimmable LYTSwitch-4 and removing the damper and formed between L1, L2, C4 and the AC line impedance. A small
bleeder circuit. It was optimized to drive an LED string at a bulk capacitor (C5) is required to provide a low impedance path
voltage of 36 V with a constant current of 0.550 A ideal for high for the primary switching current. The maximum value of C4
Lumens PAR lamp retro-fit applications. The design operates and C5 is limited in order to maintain a power factor of greater
over an input voltage range of 185 VAC to 265 VAC. than 0.9.
The key goals of this design were compatibility with standard LYTSwitch-4 High-Line Primary
leading edge TRIAC AC dimmers, very wide dimming range, To provide peak line voltage information to U1 the incoming
high efficiency (>85%) and high power factor (>0.9). The design rectified AC peak charges C6 via D2. This is then fed into the
is fully protected from faults such as no-load (open-load), over- VOLTAGE MONITOR pin of U1 as a current via R14 and R15.
voltage and output short-circuit or overload conditions and This sensed current is also used by the device to set the line
over-temperature. input overvoltage protection threshold. Resistor R13 provides a
discharge path for C6 with a time constant much longer than that
Circuit Description
of the rectified AC to minimize generation of line frequency ripple.
The LYTSwitch-4 high-line device (U1-LYT4324E) integrates the
power FET, controller and start-up functions into a single package The VOLTAGE MONITOR pin current and the FEEDBACK pin
reducing the component count versus typical implementations. current are used internally to control the average output LED
Configured as part of an isolated continuous conduction mode current. For TRIAC phase-dimming or non-dimming applications
flyback converter, U1 provides high power factor via its internal the same value of resistance 24.9 kW is used on the REFERENCE
control algorithm together with the small input capacitance of pin resistor (R18) and 4 MW (R14 + R15) on the VOLTAGE MONITOR
the design. Continuous conduction mode operation results in pin to provide a linear relationship between input voltage and
reduced primary peak and RMS current. This both reduces the output current and maximizing the dimming range.
EMI noise, allowing simpler, smaller EMI filtering components
and improves efficiency. Output current regulation is maintained
without the need for secondary-side sensing which eliminates
current sense resistors and improves efficiency.

C13
R25 100 pF
30 Ω 200 V
VR4 C14 C15
SMAJ200A-13-F 330 µF 330 µF R26 36 V,
200 V 63 V 63 V 7.5 kΩ 550 mA
1 FL1
DFLU1400-7

D8 TP3
BR1 R13 C7 BYW29-200
D2

B10S-G 510 kΩ 2.2 nF

1/8 W RTN
1000 V R7 630 V 7 FL2
162 kΩ R22 R21 TP4
1% 39 Ω 20 kΩ
R4 1/8 W 1/8 W
6
1 MΩ
R14 D3
2 MΩ D6 C11 C9
R8 US1J 56 µF
1% BAV21 100 nF
RV1 162 kΩ 50 V 50 V
250 VAC 1% 8
R15
R5 2 MΩ T1
1 MΩ 1% RM7/1

2 3 C2 3 4
47 pF C4 C5 C6 D4
L1 R3 1 kV 120 nF 220 nF 2.2 µF US1D
RM5 12 kΩ 400 V 400 V 400 V
1/8 W 1 L2 2 R19 D7
1 4 5 mH 6.2 kΩ BAV21WS-7-F
D1 R20
133 kΩ
MMSZ5256BS-7-F
BAV16WS-7-F

R27 R28 BAV21 VR1 D V

510 Ω 510 Ω Q2 1N5245B-T 1%
1% 1% MMBT3906 15 V 1/8 W
CONTROL
D5

C1 LYTSwitch-4
33 V
VR2

BP
220 nF U1
IRFU320PBF

R10 LYT4324E
MMBT3906

400 V
15 Ω
Q3

S R FB Q4
Q1

R1 R2 MMBT3904LT1G C12
C3 100 nF
F1 510 Ω 510 Ω 22 nF
1% 1% R9 R18 50 V
5A R6 30.1 kΩ 50 V 24.9 kΩ C8
100 µF C10 R23 R24
190 - 265 2.4 MΩ 1% R11 1% 10 Ω
R12 1/16 W 10 V 10 nF 1 kΩ
VAC 240 Ω 1/10 W
L N 2W 47 kΩ 50 V 1/10 W CY1
TP1 TP2 470 pF
250 VAC
PI-7088-072913

Figure 8. DER-396 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 185 – 265 VAC, 20 W / 36 V LED Driver.

6
Rev. C 11/14 www.power.com
LYT4221-4228/4321-4328

Diode D3, VR4 and C7 clamp the drain voltage to a safe level Due to the much lower power consumed by LED based lighting
due to the effects of leakage inductance. Diode D4 is the current drawn by the overall lamp is below the holding
necessary to prevent reverse current from flowing through U1 current and/or latching of the TRIAC within the dimmer. This
for the period of the rectified AC input voltage that the voltage can cause undesirable behaviors such as limited dimming
across C5 falls to below the reflected output voltage (VOR). range and/or flickering as the TRIAC fires inconsistently. The
relatively large impedance the LED lamp presents to the line
Diode D6, C9, C11, R21 and R22 create the primary bias supply allows significant ringing to occur due to the inrush current
from an auxiliary winding on the transformer. Capacitor C8 charging the input capacitance when the TRIAC turns on. This
provides local decoupling for the BYPASS pin of U1 which is the too can cause similar undesirable behavior as the ringing may
supply pin for the internal controller. During start-up C8 is cause the TRIAC current to fall to zero and turn off.
charged to ~6 V from an internal high-voltage current source
tied to the device DRAIN pin. This allows the part to start To overcome these issues two simple circuits, the MOSFET
switching at which point the operating supply current is provided active damper and RC passive bleeder were employed.
from the bias supply via R19 and D5. Capacitor C8 also selects Employing these circuits however comes without penalty, since
the output power mode (47 mF for reduced power was selected their purpose is to satisfy the holding and latching current of a
to reduce dissipation in U1 and increase efficiency). TRIAC by providing some low impedance path for the TRIAC
current to flow continuously during the turn-on phase will
Feedback introduce additional dissipation and therefore reduced system
The bias winding voltage is proportional to the output voltage efficiency of the supply. For non-dimming applications these
(set by the turn ratio between the bias and secondary windings). circuits can simply be omitted (see Figure 9).
This allows the output voltage to be monitored without secondary-
side feedback components. Resistor R20 converts the bias Power Integrations proprietary active damper circuit is used in
voltage into a current which is fed into the FEEDBACK pin of U1. this design for achieving high efficiency, good dimmer
The internal engine within LYTSwitch-4 (U1) combines the compatibility and line surge protection.
FEEDBACK pin current, the VOLTAGE MONITOR pin current
and drain current information to provide a constant output MOSFET Q3 is always on during non-dimming (no TRIAC
current over up to 1.5 : 1 output voltage variation (LED string connected) operation. It bypasses the loss across the damper
voltage variation of ±25%) at a fixed line input voltage. resistor (R11) via the low RDS(ON) of the MOSFET Q3 thereby
maintaining high system efficiency. The gate of Q3 is biased
To limit the output voltage at no-load an output overvoltage through the divider of R4, R5, and R6 and filtered by C13.
protection circuit is set by D7, C12, R24, VR2, R23, C10 and Q4.
Should the output load be disconnected the bias voltage will While Q3 is always on during non-dimming operation, MOSFET
increase until VR2 conducts, biasing Q4 to turn on via R23 and Q3 operates differently during dimming. When the TRIAC turns
pulling down current going into the FEEDBACK pin. When the on at the beginning of every AC half-line cycle MOSFET Q3 is
feedback current drops below 10 mA the part enters auto- off initially allowing the resistor (R11) to damp the current ringing
restart and the switching of the MOSFET is disabled for 600 ms, due to inrush of current induced by the input bulk capacitance
allowing time for the output and bias voltages to fall. and EMI filter impedance. After approximately 1 ms Q3 turns
on and bypasses R11. The effect is increased compatibility with
Output Rectification different types of dimmers.
The transformer secondary winding is rectified by D8 and
filtered by C14 and C15. An ultrafast TO-220 diode was During differential line surge occurrence where a high dv/dt is
selected for efficiency and the combined value of C11 and C12 detected through the RC high-pass filter R7, R8 and C2.
were selected to give peak-to-peak LED ripple current equal to Transistor Q2 will turn off Q3 and a voltage proportional to the
30% of the mean value. For designs where lower ripple is input current that will develop across the damper resistor will be
desirable the output capacitance value can be increased. subtracted from the input thus limiting the voltage stress on the
A small pre-load is provided by R26 which discharges residual DRAIN pin of U1.
charge in output capacitors when turned off.
Resistor R9 bleeds the charge from C2 and ensures Q2 is off
TRIAC Phase Dimming Control Compatibility
during normal operation.
The requirement to provide output dimming with low cost,
TRIAC-based, leading edge phase dimmers introduces a
The passive bleeder circuit is comprised of R1, R2, R27, R28
number of trade-offs in the design.
and C1. This network helps keep the input current above the
TRIAC holding current while the input current corresponding to
the effective driver resistance increases during each AC half-cycle.

7
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LYT4221-4228/4321-4328

Modified DER-396 20 W High Power Factor LED Driver • Efficiency of 85%

for Non-Dimmable and Enhanced Line Regulation • Device local ambient of 70 °C
• Sufficient heat sinking to keep the device temperature
The circuit schematic in Figure 9 shows a high power factor below 100 °C
LED driver based on a LYT4224E from the LYTSwitch-4 non- • For minimum output power column
dimming high-line family of devices. It was optimized to drive • Reflected output voltage (VOR) of 135 V
an LED string at a voltage of 36 V with a constant current of • FEEDBACK pin current of 135 mA
0.55 A, ideal for high lumens PAR lamp retro-fit applications. • BYPASS pin capacitor value of 47 mF
The design operates over the high-line input voltage range of • For maximum output power column
185 VAC to 265 VAC and is non-dimming application. A non- • Reflected output voltage (VOR) of 90 V
dimming application has tighter output current variation with • FEEDBACK pin current of 165 mA
changes in the line voltage than a dimming application. It’s key • BYPASS pin capacitor value of 4.7 mF
to note that, although not specified for dimming, no circuit • (LYT4x21 = 4.7 mF)
damage will result if the end user does operate the design with
a phase controlled dimmer. Note that input line voltages above 185 VAC do not change the
power delivery capability of LYTSwitch-4 high-line devices.
Modification for Non-Dimmable Configuration
The DER-396 is configurable for non-dimmable application by Device Selection
simply removing the components of the MOSFET active damper Select the device size by comparing the required output power
(R4, R5, R6, R7, R8, R9, R10, R11, D1, Q1, Q2, C3, and VR1) to the values in Table 1. For thermally challenging designs, e.g.,
and passive R-C bleeder (R1, R2, R27, R28 and C1) and replacing incandescent lamp replacement, where either the ambient
the IC U1 to LYT4224E, non-dimmable device LYTSwitch-4 non- temperature local to the LYTSwitch-4 high-line device is high
dimming high-line family. For non-dimmable application audible and/or there is minimal space for heat sinking use the minimum
noise is not critical so L1 and L2 can be replaced with a regular output power column. This is selected by using a 47 mF BYPASS
off-the-shelf dog bone inductor for cost reduction (See Figure 9). pin capacitor and results in a lower device current limit and
therefore lower conduction losses. For open frame design or
Key Application Considerations designs where space is available for heat sinking then refer to the
maximum output power column. This is selected by using a
Power Table 4.7 mF BYPASS pin capacitor for all but the LYT4x21 which has only
The data sheet power table (Table 1) represents the minimum one power setting. In all cases in order to obtain the best output
and maximum practical continuous output power based on the current tolerance maintain the device temperature below 100 °C.
following assumed conditions:

C13
R25 100 pF
30 Ω 200 V
VR4 C14 C15
SMAJ200A-13-F 330 µF 330 µF R26 36 V,
200 V 63 V 63 V 7.5 kΩ 550 mA
1 FL1
TP3
DFLU1400-7

D8
R13 C7 BYW29-200
510 kΩ
D2

2.2 nF RTN
1/8 W 630 V 7 FL2
R22 R21 TP4
39 Ω 20 kΩ
1/8 W 1/8 W
6
R14 D3
2 MΩ D6 C11 C9
US1J 56 µF
BR1 1% BAV21 100 nF
B10S-G 50 V 50 V
1000 V 8
R15
2 MΩ T1
1% RM7/1

C4 C5 C6 D4
120 nF 220 nF 2.2 µF US1D
RV1 400 V 400 V 400 V
250 VAC R19 D7
6.2 kΩ BAV21WS-7-F
R20
133 kΩ
MMSZ5256BS-7-F
BAV16WS-7-F

D V 1%
R3 1/8 W
12 kΩ CONTROL
D5

R29 LYTSwitch-4
33 V
VR2

1/8 W L3 BP
12 kΩ U1
L1 1.5 mH LYT4224E
1/8 W 1.5 mH
S R FB Q4
MMBT3904LT1G C12
100 nF
F1 R12 R18 50 V
5A 47 kΩ 24.9 kΩ C8
47 µF C10 R23 R24
190 - 265 1/8 W 1% 10 Ω
1/16 W 16 V 10 nF 1 kΩ
VAC 50 V 1/10 W 1/10 W
L N CY1
TP1 TP2 470 pF
L2 250 VAC
1.5 mH PI-7089-102313

Figure 9. Modified Schematic of DER-396 for Non-Dimmable, Isolated, High Power Factor, 185-265 VAC, 20 W / 36 V LED Driver.

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LYT4221-4228/4321-4328

Maximum Input Capacitance Line Voltage Peak Detector Circuit

To achieve high power factor, the capacitance used in both the LYTSwitch-4 high-line devices use the peak line voltage to
EMI filter and for decoupling the rectified AC (bulk capacitor) regulate the power delivery to the output. A capacitor value of
must be limited in value. The maximum value is a function of 1 mF to 4.7 mF is recommended to minimize line ripple and give
the output power of the design and reduces as the output the highest power factor (>0.9), smaller values are acceptable
power reduces. For the majority of designs limit the total but result in lower PF and higher line current distortion.
capacitance to less than 220 nF with a bulk capacitor value of
100 nF. Film capacitors are recommended compared to Operation with Phase Controlled Dimmers
ceramic types as they minimize audible noise with operating Dimmer switches control incandescent lamp brightness by not
with leading edge phase dimmers. Start with a value of 10 nF conducting (blanking) for a portion of the AC voltage sine wave.
for the capacitance in the EMI filter and increase in value until This reduces the RMS voltage applied to the lamp thus reducing
there is sufficient EMI margin. the brightness. This is called natural dimming and the LYTSwitch-4
high-line LYT4321-4328 devices when configured for dimming
REFERENCE Pin Resistance Value Selection utilize natural dimming by reducing the LED current as the RMS
The LYTSwitch-4 high-line family contains phase dimming line voltage decreases. By this nature, line regulation performance
devices, LYT4321-4328, and non-dimming devices, LYT4221- is purposely decreased to increase the dimming range and
4228. Both the non-dimmable devices and dimmable devices more closely mimic the operation of an incandescent lamp.
use 24.9 kW ±1% REFERENCE pin resistor for best output
current tolerance (over AC input voltage changes). Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with low-
VOLTAGE MONITOR Pin Resistance Network Selection cost, TRIAC-based, leading edge phase dimmers introduces a
For widest AC phase angle dimming range with LYT4321-4328, number of trade-offs in the design.
use a 4 MW resistor connected to the line voltage peak detector
circuit. Make sure that the resistor’s voltage rating is sufficient Due to the much lower power consumed by LED based lighting
for the peak line voltage. If necessary use multiple series the current drawn by the overall lamp is below the holding
connected resistors. current of the TRIAC within the dimmer. This causes undesirable
behaviors such as limited dimming range and/or flickering. The
Primary Clamp and Output Reflected Voltage VOR relatively large impedance the LED lamp presents to the line
A primary clamp is necessary to limit the peak drain to source allows significant ringing to occur due to the inrush current
voltage. A Zener clamp requires the fewest components and charging the input capacitance when the TRIAC turns on. This
board space and gives the highest efficiency. RCD clamps are too can cause similar undesirable behavior as the ringing may
also acceptable however the peak drain voltage should be care- cause the TRIAC current to fall to zero and turn off.
fully verified during start-up and output short-circuits as the
clamping voltage varies with significantly with the peak drain To overcome these issues two circuits, the active damper and
current. passive bleeder, are incorporated. The drawback of these
circuits is increased dissipation and therefore reduced efficiency
For the highest efficiency, the clamping voltage should be of the supply so for non-dimming applications these components
selected to be at least 1.5 times the output reflected voltage, can simply be omitted.
VOR, as this keeps the leakage spike conduction time short.
When using a Zener clamp in a universal input or high-line only Figure 10(a) shows the line voltage and current at the input of a
application, a VOR of less than 135 V is recommended to allow leading edge TRIAC dimmer with Figure 10(b) showing the
for the absolute tolerances and temperature variations of the resultant rectified bus voltage. In this example, the TRIAC
Zener. This will ensure efficient operation of the clamp circuit conducts at 90 degrees.
and will also keep the maximum drain voltage below the rated
breakdown voltage of the FET. An RCD (or RCDZ) clamp Figure 11 shows undesired rectified bus voltage and current
provides tighter clamp voltage tolerance than a Zener clamp. with the TRIAC turning off prematurely and restarting.
The RCD clamp is more cost-effective than the Zener clamp but
requires more careful design to ensure that the maximum drain If the TRIAC is turning off before the end of the half-cycle
voltage does not exceed the power FET breakdown voltage. erratically or alternate half AC cycles have different conduction
These VOR limits are based on the BVDSS rating of the internal angles then flicker will be observed in the LED light due to
FET, a VOR of 90 V to 120 V is typical for most designs, giving variations in the output current. This can be solved by including
the best PFC and regulation performance. a bleeder and damper circuit.

Series Drain Diode Dimmers will behave differently based on manufacturer and
An ultrafast or Schottky diode in series with the drain is power rating, for example a 300 W dimmer requires less
necessary to prevent reverse current flowing through the device. dampening and requires less power loss in the bleeder than a
The voltage rating must exceed the output reflected voltage, 600 W or 1000 W dimmer due to different drive circuits and
VOR. The current rating should exceed two times the average TRIAC holding current specifications. Line voltage also has a
primary current and have a peak rating equal to the maximum significant impact as at high-line for a given output power the
drain current of the selected LYTSwitch-4 high-line device.

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PI-5983-060810 PI-5985-060810
350 0.35 350 0.35

Line Current (Through Dimmer) (A)

Line Voltage (at Dimmer Input) (V)

Voltage Voltage
300 0.3

Rectified Input Current (A)

Rectified Input Voltage (V)
250 Current
0.25 Current

150 0.15 250 0.25

50 0.05 200 0.2

-50 0.5 50 100 150 200 250 300 350 400

-0.05 150 0.15

-150 -0.15 100 0.1

-250 -0.25 50 0.05

-350 -0.35 0 0
0 50 100 150 200 250 300 350 400
Conduction Angle (°)
Conduction Angle (°)
Figure 10a. Ideal Input Voltage and Current Waveforms for a Leading Edge
TRIAC Dimmer at 90° Conduction Angle. Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.

PI-5984-060810 PI-5986-060810
350 0.35 350 0.35
Voltage Voltage

Dimmer Output Current (A)

Dimmer Output Voltage (V)
Rectified Input Current (A)
300 0.3
Rectified Input Voltage (V)

Current 250 Current

0.25

250 0.25 150 0.15

200 0.2 50 0.05

150 0.15 -50 0 50 100 150 200 250 300 350

-0.05

100 0.1 -150 -0.15

50 0.05 -250 -0.25

0 0 -350 -0.35
0 50 100 150 200 250 300 350 400
Conduction Angle (°)
Conduction Angle (°)
Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing
Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output. Edge Dimmer at 90° Conduction Angle.

input current and therefore TRIAC current is lower but the peak C3 will improve dimmer compatibility but cause more power to
inrush current when the input capacitance charges is higher be dissipated across the damper resistor. Monitor the AC line
creating more ringing. Finally multiple lamps in parallel driven from current and voltage at the input of the power supply as you
the same dimmer can introduce more ringing due to the increased make the adjustments. Increase the delay until the TRIAC
capacitance of parallel units. Therefore, when testing dimmer operates properly but keep the delay as short as possible for
operation verify on a number of models, different line voltages efficiency.
and with both a single driver and multiple drivers in parallel.
As a general rule the greater the power dissipated in the bleeder
Start by adding a bleeder circuit. Add a 0.44 mF capacitor and and damper circuits, the more types of dimmers will work with
510 W 1 W resistor (components in series) across the rectified the driver.
bus (C1 and R1, R2, R27, R28 in Figure 8). If the results in
satisfactory operation reduce the capacitor value to the smallest Trailing Edge Phase Controlled Dimmers
that result in acceptable performance to reduce losses and Figure 12 shows the line voltage and current at the input of the
increase efficiency. power supply with a trailing edge dimmer. In this example, the
dimmer conducts at 90 degrees. Many of these dimmers use
If the bleeder circuit does not maintain conduction in the TRIAC, back-to-back connected power FETs rather than a TRIAC to
then add an active damper as shown in Figure 8. This circuit control the load. This eliminates the holding current issue of
limits the inrush current that flows to charge C4 and C5 when TRIACs and since the conduction begins at the zero crossing, high
the TRIAC turns on by placing the damper resistor (R11, R29) in current surges and line ringing are minimized. These types of
series for the first 1 ms of the TRIAC conduction. After approxi- dimmers do not require damping circuits but do require a
mately 1 ms, Q3 turns on and shorts the damper resistor. This bleeder. However the bleeder ensures that the AC voltage
keeps the power dissipation on the damper resistor low and across the dimmer falls to a low enough level for the dimmer to
allows a larger value to be used during current limiting. Increasing correctly detect zero crossing. This is used internally by the
the delay before Q3 turns on by increasing the value of capacitor dimmer for timing.

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Audible Noise Considerations for use with lifetime. For every 10 °C rise in temperature, component life is
Leading Edge Dimmers reduced by a factor of 2. Therefore it is important to properly
Noise created when dimming is typically created by the input heat sink and to verify the operating temperatures of all devices.
capacitors, EMI filter inductors and the transformer. The input
capacitors and inductors experience high di/dt and dv/dt every Layout Considerations
AC half-cycle as the TRIAC fires and an inrush current flows to
charge the input capacitance. Noise can be minimized by Primary-Side Connections
selecting film vs. ceramic capacitors, minimizing the capacitor Use a single point (Kelvin) connection at the negative terminal of
value and selecting inductors that are physically short and wide. the input filter capacitor for the SOURCE pin and bias returns.
This improves surge capabilities by returning surge currents
The transformer may also create noise which can be minimized from the bias winding directly to the input filter capacitor. The
by avoiding cores with long narrow legs (high mechanical BYPASS pin capacitor should be located as close to the BYPASS
resonant frequency). For example, RM cores produce less pin and connected as close to the SOURCE pin as possible.
audible noise than EE cores for the same flux density. Reducing The SOURCE pin trace should not be shared with the main
the core flux density will also reduce the noise. Reducing the power FET switching currents. All FEEDBACK pin components
maximum flux density (BM) to 1500 Gauss usually eliminates that connect to the SOURCE pin should follow the same rules
any audible noise but must be balanced with the increased core as the BYPASS pin capacitor. It is critical that the main power
size needed for a given output power. FET switching currents return to the bulk capacitor with the
shortest path as possible. Long high current paths create
Thermal and Lifetime Considerations excessive conducted and radiated noise.
Lighting applications present thermal challenges to the driver.
In many cases the LED load dissipation determines the working Secondary-Side Connections
ambient temperature experienced by the drive so thermal The output rectifier and output filter capacitor should be as
evaluation should be performed with the driver inside the final close as possible. The transformer’s output return pin should
enclosure. Temperature has a direct impact on driver and LED have a short trace to the return side of the output filter capacitor.

BYPASS Pin
LYT4224E Capacitor Clamp Transformer Output
Input EMI Filter Diode
Bullk
Capacitor

Output
Capacitor

REFERENCE Pin
Resistor

FEEDBACK Pin
Resistor Output
VOLTAGE MONITOR Pin Capacitors
Resistor
PI-7096-102313

Figure 13. DER-396 20 W Layout Example, Top Silkscreen / Bottom Layer.

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Quick Design Checklist

Maximum Drain Voltage

Verify that the peak VDS does not exceed the device absolute
maximum rating under all operating conditions including
start-up and fault conditions.

Maximum Drain Current

Thermal Check
At maximum output power, both minimum and maximum line
voltage and ambient temperature; verify that temperature
specifications are not exceeded for the LYTSwitch-4 high-line,
transformer, output diodes, output capacitors and drain clamp
components.

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Absolute Maximum Ratings(1,4)

DRAIN Pin Peak Current(5): LYT4x21..................................1.37 A Operating Junction Temperature(2)..........................-40 to 150 °C
LYT4x22..................................2.08 A
LYT4x23..................................2.72 A Notes:
LYT4x24................................. 4.08 A 1. All voltages referenced to SOURCE, TA = 65 °C.
LYT4x25................................. 5.44 A 2. Normally limited by internal circuitry.
LYT4x26................................. 6.88 A 3. 1/16 in. from case for 5 seconds.
LYT4x27..................................7.33 A 4. Absolute Maximum Ratings specified may be applied, one
LYT4x28....................................9.0 A at a time without causing permanent damage to the
DRAIN Pin Voltage ……………………….................. -0.3 to 725 V product. Exposure to Absolute Maximum Ratings for
BYPASS Pin Voltage.................................................. -0.3 to 9 V extended periods of time may affect product reliability.
BYPASS Pin Current ………………………....................... 100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is
VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6) simultaneously less than 400 V. See also Figure 10.
FEEDBACK Pin Voltage ……...................................... -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins
REFERENCE Pin Voltage .......................................... -0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can
Lead Temperature(3) .........................................................260 °C safely rise to 15 V without damage.
Storage Temperature ………………….................... -65 to 150 °C
Thermal Resistance

Thermal Resistance: E Package Notes:

LYT4x22 -10.89 -6.22 -4.67

LYT4x23 -16.21 -9.26 -6.95

VBP = 0 V, LYT4x24 -21.88 -12.5 -9.38

ICH1
TJ = 65 °C LYT4x25 -26.25 -15.0 -11.25

LYT4x26 -15.75 -9.00 -6.75

LYT4x27 -17.50 -10.0 -7.50

BYPASS Pin LYT4x28 -20.65 -11.8 -8.85

mA
Charge Current LYT4x21 -1.23 -0.7 -0.49

LYT4x22 -4.38 -2.5 -1.75

LYT4x23 -8.05 -4.6 -3.22

VBP = 5 V, LYT4x24 -11.64 -6.65 -4.66

ICH2
TJ = 65 °C LYT4x25 -15.10 -8.63 -6.04

LYT4x26 -7.61 -4.35 -3.05

LYT4x27 -9.22 -5.27 -3.69

LYT4x28 -10.15 -5.8 -4.06

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)

Control Functions (cont.)

Charging Current
See Note A, B 0.7 %/°C
Temperature Drift
BYPASS Pin Voltage VBP 0 °C < TJ < 100 °C 5.75 5.95 6.15 V
BYPASS Pin
VBP(H) 0 °C < TJ < 100 °C 0.85 V
Voltage Hysteresis
BYPASS Pin IBP = 4 mA
VBP(SHUNT) 6.1 6.4 6.7 V
Shunt Voltage 0 °C < TJ < 100 °C
TJ = 65 °C
Soft-Start Time tSOFT 51 72 ms
VBP = 5.9 V
0 °C < TJ < 100 °C
ICD2 0.5 0.8 1.2
FET Not Switching
Drain Supply Current mA
0 °C < TJ < 100 °C
ICD1 1 2.5 4
FET Switching at fOSC
VOLTAGE MONITOR Pin

Line Overvoltage TJ = 65 °C Threshold 105 112 119

IOV mA
Threshold RR = 24.9 kW Hysteresis 5

VOLTAGE MONITOR 0 °C < TJ < 100 °C

VV LYT4x21-4x28 2.75 3.00 3.25 V
Pin Voltage IV < IOV

VOLTAGE MONITOR Pin VV = 5 V

IV(SC) LYT4x27-4x28 150 175 200 mA
Short-Circuit Current TJ = 65 °C

Remote ON/OFF
VV(REM) TJ = 65 °C 0.5 V
Threshold
FEEDBACK Pin
FEEDBACK Pin Current
at Onset of Maximum IFB(DCMAXR) 0 °C < TJ < 100 °C 90 mA
Duty Cycle
FEEDBACK Pin Current
IFB(SKIP) TJ = 65 °C 210 mA
Skip Cycle Threshold
IFB(DCMAXR) < IFB < IFB(SKIP)
Maximum Duty Cycle DCMAX 85 99.9 %
0 °C < TJ < 100 °C
IFB = 150 mA
FEEDBACK Pin Voltage VFB 2.1 2.3 2.56 V
0 °C < TJ < 100 °C
FEEDBACK Pin VFB = 5 V
IFB(SC) 320 380 480 mA
Short-Circuit Current TJ = 65 °C
DC10 IFB = IFB(AR), TJ = 65 °C, See Note B 13

Duty Cycle Reduction DC40 IFB = 40 mA, TJ = 65 °C 37 %

DC60 IFB = 60 mA, TJ = 65 °C 60

Auto-Restart
TJ = 65 °C
Auto-Restart ON-Time tAR 51 72 ms
VBP = 5.9 V

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)
Auto-Restart (cont.)
Auto-Restart TJ = 65 °C
DCAR 12.5 %
Duty Cycle See Note B
SOA Minimum Switch TJ = 65 °C
tON(SOA) 0.875 ms
ON-Time See Note B
FEEDBACK Pin Current
IFB(AR) 0 °C < TJ < 100 °C 6.5 10 mA
During Auto-Restart
REFERENCE Pin
REFERENCE Pin
VR 1.223 1.245 1.273 V
Voltage RR = 24.9 kW
REFERENCE Pin 0 °C < TJ < 100 °C
IR 48.69 49.94 51.19 mA
Current
Current Limit/Circuit Protection
di/dt = 138 mA/ms LYT4x22 0.79 0.92

di/dt = 145 mA/ms LYT4x23 0.99 1.15

Full Power ILIMIT(F) di/dt = 180 mA/ms LYT4x24 1.18 1.38
Current Limit A
(CBP = 4.7 mF) TJ = 65 °C di/dt = 227 mA/ms LYT4x25 1.41 1.63

di/dt = 272 mA/ms LYT4x26 1.89 2.19

di/dt = 375 mA/ms LYT4x27 2.61 3.03

di/dt = 110 mA/ms LYT4x21 0.59 0.69

di/dt = 158 mA/ms LYT4x22 0.65 0.76

di/dt = 155 mA/ms LYT4x23 0.8 0.93

Reduced Power ILIMIT(R) di/dt = 188 mA/ms LYT4x24 0.95 1.11
Current Limit A
(CBP = 47 mF) TJ = 65 °C di/dt = 240 mA/ms LYT4x25 1.14 1.33

di/dt = 300 mA/ms LYT4x26 1.38 1.61

di/dt = 415 mA/ms LYT4x27 1.88 2.18

di/dt = 770 mA/ms LYT4x28 3.92 4.56

Minimum
tLEB + tIL(D) TJ = 65 °C 270 450 630 ns
ON-Time Pulse
Leading Edge TJ = 65 °C
tLEB 110 375 ns
Blanking Time See Note B
TJ = 65 °C
Current Limit Delay tIL(D) 150 ns
See Note B
Thermal Shutdown
See Note B LYT4x21-4x28 147 155 164 °C
Temperature
Thermal Shutdown
See Note B 56 °C
Hysteresis
BYPASS Pin Power-Up
Reset Threshold VBP(RESET) 0 °C < TJ < 100 °C 2.25 3.30 4.25 V
Voltage

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Conditions
Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)

Output

LYT4x21 TJ = 65 °C 11.5 13.2

ID = 100 mA TJ = 100 °C 13.5 15.5

LYT4x22 TJ = 65 °C 6.9 8.0

ID = 100 mA TJ = 100 °C 8.4 9.7

LYT4x23 TJ = 65 °C 5.3 6.0

ID = 150 mA TJ = 100 °C 6.3 7.3

LYT4x24 TJ = 65 °C 3.4 3.9

ID = 150 mA TJ = 100 °C 3.9 4.5
ON-State Resistance RDS(ON) W
LYT4x25 TJ = 65 °C 2.5 2.9
ID = 200 mA TJ = 100 °C 3.0 3.4

LYT4x26 TJ = 65 °C 1.9 2.2

ID = 250 mA TJ = 100 °C 2.3 2.7

LYT4x27 TJ = 65 °C 1.8 2.0

ID = 350 mA TJ = 100 °C 2.1 2.5

LYT4x28 TJ = 65 °C 1.3 1.5

ID = 600 mA TJ = 100 °C 1.6 1.9

VBP = 6.4 V
OFF-State Drain
IDSS VDS = 560 V 50 mA
Leakage Current
TJ = 100 °C
VBP = 6.4 V
Breakdown Voltage BVDSS 725 V
TJ = 65 °C
Minimum Drain
TJ < 100 °C 36 V
Supply Voltage
Rise Time tR Measured in a Typical Flyback 100 ns

Fall Time tF See Note B 50 ns

Note: The parameter values and limits specified herein are based on a limited data set. There is a small likelihood that minor
changes may be required based on additional data as they become available.

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Typical Performance Characteristics

10000 300

PI-6966-102313
PI-6965-102313
Scaling Factors: Scaling Factors:
LYT4x21 0.18 LYT4x21 0.18
LYT4x22 0.28 LYT4x22 0.28
DRAIN Capacitance (pF)

LYT4x23 0.38 LYT4x23 0.38

LYT4x24 0.56 LYT4x24 0.56
1000 LYT4x25 0.75 200 LYT4x25 0.75

Power (mW)
LYT4x26 1.00 LYT4x26 1.00
LYT4x27 1.16 LYT4x27 1.16
LYT4x28 1.55 LYT4x28 1.55

100 100

10 0
1 100 200 300 400 500 600 0 100 200 300 400 500 600 700
DRAIN Pin Voltage (V) DRAIN Voltage (V)
Figure 14. Drain Capacitance vs. Drain Pin Voltage. Figure 15. Power vs. Drain Voltage.

(Normalized to Absolute Maximum Rating)

5 1.2

PI-6010-060410
PI-6967-102313

1
4
DRAIN Current (A)

DRAIN Current

0.8
3
Scaling Factors:
LYT4x21 0.18 0.6
LYT4x22 0.28
2 LYT4x23 0.38
LYT4x24 0.56
LYT4x25 0.75 0.4
LYT4x26 1.00
1 LYT4x27 1.16
LYT4x28 1.55 0.2
LYT42x8 TCASE = 25 °C
LYT42x8 TCASE = 100 °C
0 0
0 2 4 6 8 10 12 14 16 18 20 0 100 200 300 400 500 600 700 800
DRAIN Voltage (V) DRAIN Voltage (V)
Figure 16. Drain Current vs. Drain Voltage. Figure 17. Maximum Allowable Drain Current vs. Drain Voltage.

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eSIP-7C (E Package)

C
2
0.403 (10.24) 0.081 (2.06) 0.264 (6.70)
A
0.397 (10.08) 0.077 (1.96) Ref.
B

Detail A
2
0.325 (8.25) 0.290 (7.37)
Ref. 0.198 (5.04) Ref.
0.320 (8.13)
0.519 (13.18)
Ref.

Pin #1 0.016 (0.41) 0.207 (5.26)

0.140 (3.56)
I.D. Ref. 0.187 (4.75)
0.120 (3.05)

0.070 (1.78) Ref. 0.047 (1.19) 3 4

0.033 (0.84) 6×
0.050 (1.27) 0.100 (2.54)
3 0.016 (0.41) 6× 0.028 (0.71)
0.011 (0.28) 0.118 (3.00)
0.010 M 0.25 M C A B
0.020 M 0.51 M C
FRONT VIEW SIDE VIEW BACK VIEW

10° Ref. 0.100 (2.54)

All Around

0.021 (0.53) 0.060 (1.52) 0.020 (0.50) 0.050 (1.27)

0.019 (0.48) Ref. 0.050 (1.27)
PIN 1

0.048 (1.22) 0.059 (1.50) 0.155 (3.93)

0.378 (9.60) 0.046 (1.17)
Ref. 0.019 (0.48) Ref.
0.023 (0.58)
PIN 7
END VIEW
0.027 (0.70)
0.059 (1.50)
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994. DETAIL A
2. Dimensions noted are determined at the outermost 0.100 (2.54) 0.100 (2.54)
extremes of the plastic body exclusive of mold flash,
tie bar burrs, gate burrs, and interlead flash, but including MOUNTING HOLE PATTERN
any mismatch between the top and bottom of the plastic (not to scale)
body. Maximum mold protrusion is 0.007 [0.18] per side.
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Controlling dimensions in inches (mm).

PI-4917-061510

18
Rev. C 11/14 www.power.com
LYT4221-4228/4321-4328

Part Ordering Information

• LYTSwitch Product Family
• 4 Series Number
• PFC/Dimming
2 PFC No Dimming
3 PFC Dimming
• Voltage Range
2 High-Line
• Device Size
• Package Identifier
LYT 4 2 2 3 E E eSIP-7C

19
www.power.com Rev. C 11/14
Revision Notes Date
A Initial Release. 11/13
B LYT4x27E, LYT4x28E – updated / added parameters: ICH1, ICH2, VV, IV(SC), and ILIMIT(F). 03/11/14
Updated ICH1 and ICH2, VBP(SHUNT), IOV, VV, IV(SC), IFB(SKIP), IFB(SC), ILIMIT(R), RDS(ON), Duty Cycle Reduction, Thermal Shutdown Temperature
C 11/11/14
and Hysteresis parameters per PCN-14441.

For the latest updates, visit our website: www.power.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD
PARTY RIGHTS.

Life Support Policy

Power Integrations Worldwide Sales Support Locations

World Headquarters Germany Japan Taiwan

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