VN5T016AH-E: Single Channel High-Side Driver With Analog Current Sense For 24 V Automotive Applications
VN5T016AH-E: Single Channel High-Side Driver With Analog Current Sense For 24 V Automotive Applications
VN5T016AH-E: Single Channel High-Side Driver With Analog Current Sense For 24 V Automotive Applications
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Thermal shutdown
– Reverse battery protected with self switch
HPAK of the PowerMOS
– Electrostatic discharge protection
Features
Applications
Max transient supply voltage VCC 58V
• All types of resistive, inductive and capacitive
Operating voltage range VCC 8 to 36V loads
Typ ON-state resistance RON 16 mΩ
Current limitation (typ) ILIM 60 A Description
OFF-state supply current IS 2 µA(1) The VN5T016AH-E is a device made using
STMicroelectronics® VIPower® technology,
1. Typical value with all loads connected.
intended for driving resistive or inductive loads
with one side connected to ground. Active VCC
• General pin voltage clamp protects the device against low
– Very low stand-by current energy spikes. This device integrates an analog
– 3.0 V CMOS compatible input current sense which delivers a current
– Optimized electromagnetic emission proportional to the load current. Fault conditions
– Very low electromagnetic susceptibility such as overload, overtemperature or short to
VCC are reported via the current sense pin.
– Compliant with European directive
2002/95/EC Output current limitation protects the device in
– Fault reset standby pin (FR_Stby) overload condition. The device latches off in case
of overload or thermal shutdown.
• Diagnostic functions
– Proportional load current sense The device is reset by a low level pass on the fault
– Current sense precision for wide range reset standby pin.
currents A permanent low level on the inputs and fault
– Off-state open load detection reset standby pin disables all outputs and sets the
– Output short to VCC detection device in standby mode.
– Overload and short to ground latch-off
– Thermal shutdown latch-off
– Very low current sense leakage
• Protections
– Undervoltage shutdown
Contents
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Maximum demagnetization energy (VCC = 24 V) . . . . . . . . . . . . . . . . . . . 22
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of tables
List of figures
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2 Electrical specifications
VCC VCC
VF
IFR_Stby IOUT
FR_Stby OUTPUT
VOUT
VFR_Stby
IIN CURRENT ISENSE
SENSE
INPUT VSENSE
VIN
GND
IGND
FR_STBY
IN
OUTPUT
CS
Overload
Channel
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VCC = 24 V 43 60 86 A
IlimH DC short circuit current
5 V < VCC < 36 V 86 A
Short circuit current
IlimL VCC = 24 V; TR < Tj < TTSD 15 A
during thermal cycling
TTSD Shutdown temperature 150 175 200 °C
TR Reset temperature TRS+1 TRS+5 °C
TRS Thermal reset of status 135 °C
Thermal hysteresis
THYST 7 °C
(TTSD-TR)
Turn-off output voltage IOUT = 5 A; VIN = 0 V;
VDEMAG VCC-58 VCC-64 VCC-70 V
clamp L = 6 mH
Output voltage drop IOUT = 500 mA;
VON 25 mV
limitation Tj = -40°C to 150°C
I = 12 mA to 100 mA;
dKLED/KLED(TOT) Current sense ratio OUT
(1) ICAL = 50 mA; VSENSE = 0.5 V; -50 50 %
drift
Tj = -40°C to 150°C
IOUT = 100 mA; VSENSE = 0.5 V;
K0 IOUT/ISENSE 1333 5600 11884
Tj = -40°C to 150°C
Current sense ratio IOUT = 100 mA; VSENSE = 0.5 V;
dK0/K0(1) -21 32 %
drift Tj = -40°C to 150°C
IOUT = 0.6 A; VSENSE = 1 V;
K1 IOUT/ISENSE Tj = -40°C to 150°C 2418 9264
5300
Tj = 25°C to 150°C 3139 7981
Current sense ratio IOUT = 0.6 A; VSENSE = 1 V;
dK1/K1(1) -21 23 %
drift Tj = -40°C to 150°C
IOUT = 3 A; VSENSE = 4 V;
K4 IOUT/ISENSE Tj = -40°C to 150°C 2843 6686
4300
Tj = 25 °C to.150 °C 3142 5634
Current sense ratio IOUT = 3 A; VSENSE = 4 V;
dK4/K4(1) -16 22 %
drift Tj = -40°C to 150°C
VSENSE < 4 V;
Delay response
0.5 A < IOUT < 20 A;
tDSENSE2H time from rising ISENSE = 90 % of ISENSE max 300 600 µs
edge of INPUT pin
(see Figure 7)
Delay response
time between rising VSENSE < 4 V;
edge of output ISENSE = 90 % of ISENSEMAX;
ΔtDSENSE2H 450 µs
current and rising IOUT = 90 % of IOUTMAX;
edge of current IOUTMAX = 5 A (see Figure 10)
sense
VSENSE < 4 V;
Delay response
0.5 A < IOUT < 20 A;
tDSENSE2L time from falling 3 20 µs
ISENSE = 10 % of ISENSE max
edge of INPUT pin
(see Figure 7)
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load in OFF-state condition.
Openload off-state
VOL voltage detection VIN = 0 V; 8 V < VCC < 36 V 2 4 V
threshold
Output short circuit to
tDSTKON VCC detection delay at See Figure 8 180 1800 µs
turn-off
Off-state output current VIN = 0 V; VSENSE = 0 V;
IL(off2) -120 0 µA
at VOUT = 4 V VOUT rising from 0 V to 4 V
Delay response from
VOUT = 4 V; VIN = 0 V;
output rising edge to
td_vol VSENSE = 90 % of VSENSEH; 20 µs
VSENSE rising edge in
RSENSE = 3.9 kΩ
openload
Output short circuit to See Figure 8;
tDFRSTK_ON VCC detection delay at 50 µs
Input1,2 = low
FRSTBY activation
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1. With FR_Stby = 5 V.
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Figure 10. Delay response time between rising edge of output current and rising edge
of current sense
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Standby L L X 0
X L L 0
Normal operation
X H H Nominal
X L L 0
Overload
X H H > Nominal
X L L 0
Overtemperature / short to
L H Cycling VSENSEH
ground
H H Latched VSENSEH
Undervoltage X X L 0
L L H 0
Short to VBAT H L H VSENSEH
X H H < Nominal
L L H 0
Open load off-state (with
H L H VSENSEH
pull-up)
X H H 0
Negative output voltage
X L Negative 0
clamp
5000
1 - 450 V - 600 V 0.5 s 5s 1 ms, 50 Ω
pulses
5000
2a + 37 V + 50 V 0.2 s 5s 50 µs, 2 Ω
pulses
1. The above test levels must be considered referred to VCC = 24.5V except for pulse 5b
2. Valid in case of external load dump clamp: 58V maximum referred to ground.
1 C C(1)
2a C C
3a C C
3b(2) E E
3b(3) C C
4 C C
5b(4) C C
1. With Rload < 24 Ω.
2. Without capacitor betweeen VCC and GND.
3. With 10 nF between VCC and GND.
4. External load dump clamp, 58 V maximum, referred to ground.
C All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to
E
disturbance and cannot be returned to proper operation without replacing the device.
Figure 13. Off-state output current Figure 14. High level input current
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Figure 17. Input high level voltage Figure 18. Input hysteresis voltage
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Figure 19. On-state resistance vs Tcase Figure 20. On-state resistance vs VCC
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3 Application information
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Equation 1
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH ) / IIHmax
Calculation example:
For VCCpeak = -600 V and Ilatchup ≥ 20 mA; VOHμC ≥ 4.5 V
30 kΩ ≤ Rprot ≤ 190 kΩ.
Recommended value: Rprot = 56 kΩ
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1. Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
("1($'5
1. Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer;
Board dimension 78x86; Board Material FR4; Cu thickness 0.070mm (front and back side); Thermal vias
separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm; Footprint
dimension 6.4 mm x 7 mm).
Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel
ON)
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Figure 28. HPAK thermal impedance junction ambient single pulse (one channel ON)
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1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tP/T
R1 (°C/W) 0.1
R2 (°C/W) 0.5
R3 (°C/W) 2
R4 (°C/W) 8
R5 (°C/W) 28 22 14
R6 (°C/W) 31 25 18
C1 (W.s/°C) 0.01
C2 (W.s/°C) 0.05
C3 (W.s/°C) 0.2
C4 (W.s/°C) 0.4
C6 (W.s/°C) 3 6 9
5 Package information
("1($'5
A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
b 0.40 0.60
b1 0.45 0.65
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 4.95 5.10 5.25
E 6.40 6.60
E1 5.00 5.20 5.40
e 0.85
e1 1.60 1.80
e2 3.30 3.50
e3 5.00 5.20
H 9.35 10.10
L 1.00 1.50
(L1) 2.60 2.80 3.00
L2 0.60 0.80 1.00
L4 0.50 1.00
R 0.20
V2 0° 8°
A Base q.ty 75
C Bulk q.ty 3000
Tube length (± 0.5) 532
A 6
B 21.3
C (± 0.1) 0.6
All dimensions are in mm.
B
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty 2500
Bulk q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 16
Tape hole spacing P0 (± 0.1) 4
Component spacing P 8
Hole diameter D (± 0.1/-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 7.5
Compartment depth K (max) 2.75
Hole spacing P1 (± 0.1) 2
Start
6 Order codes
7 Revision history
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