MP2617H

Wide input Voltage, 3A, Switching Charger

With NVDC Power Path Management
For Single Cell Li+ Battery

DESCRIPTION FEATURES
The MP2617H is a monolithic, switch-mode,  4V to 14V Operating Input Voltage
battery charger with power path management for  Smart Power Path Management
single-cell Li-ion batteries in a wide range of  Five Control Loops: Input Current Limit,
tablets and other portable devices. The Input Voltage Limit, Constant Charge
MP2617H integrates a synchronous buck Current, Terminal Battery Control, and
regulator that provides regulated voltage to Thermal Fold-back
power the system output and charge the battery  1.6MHz Switching Frequency
simultaneously. The MP2617H supports both  Programmable Input Current Limit
USB and high-power DC adapter inputs. In USB  Programmable Charge Current
mode, the input current limit can be programmed  Single Input for USB and AC Adapter
to 450mA or 825mA via the logic pins to cover  Covers USB2.0 and USB3.0 Input
USB2.0 and USB3.0 specifications. When the Specifications
adapter input is present, the input current can
 Fully Integrated Power Switches
also be limited to avoid overloading the DC
 No External Blocking Diode or Sense
adapter. The input current limit can be
Resistor Required
programmed up to 3A.
 Charging Operation Indicator
Smart power path management allows the  Built-In Programmable Charging Timer
MP2617H to regulate the system voltage for  Thermal Limiting Regulation on Chip
powering an external load and charging the  Battery Temperature Monitor
battery independently and simultaneously. This  Available in a QFN-20 (3mmx4mm)
allows for immediate system operation, even Package
under missing or deeply discharged battery
conditions. When the input current limit is APPLICATIONS
reached, the system load is satisfied first, and  Smartphones
then the charger uses the remaining current to  E-Books
charge the battery. Additionally, the smart power
 GPS
path control allows for an internal connection
 Portable Media Players
from the battery to the system to supplement
additional power to the load in the event the  Portable Handheld Solutions
system power demand increases over the input-  Tablet PCs
limited power or the input is removed. All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
The MP2617H features high integration with all “MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
power switches integrated internally. No external
MOSFET, blocking diode, or current sense
resistor is required.
Two status monitor output pins are provided to
indicate the battery’s charge status and power
source status. Other features include trickle
charge, battery temperature monitoring, and
timer and thermal limiting regulation on the chip.
The MP2617H is available in a QFN-20
(3mmx4mm) package.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

TYPICAL APPLICATION

ON OFF
AC adapter VILIM M0 M1 EN
/USB input IN SW L SYS Load
C1 R3 C3
CHGOK CSYS
BST
R4
ACOK SYS
R1
VCC
SYSFB
CIN RT1
C2 NTC PGND
R2
ICHG
BATT
TMR
vBATT
RT2
CTMR CBATT
MP2617H ISET
RISET
AGND ILIM
RNTC
RILIM

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

ORDERING INFORMATION
Part Number Package Top Marking
MP2617HGL* QFN-20 (3mmx4mm) MP2617H
* For Tape & Reel, add suffix –Z (e.g. MP2617HGL–Z)

TOP MARKING

MP: MPS prefix

Y: Year code
W: Week code
2617H: Product code of MP2617HGL
LLL: Lot number

PACKAGE REFERENCE
TOP VIEW
VLIM
TMR
ILIM
VCC

20 19 18 17

BST 1 16 NTC
SW 2 15 ISET
IN 3 14 BATT
SW 4 13 SYS
PGND 5 12 SYSFB
EN 6 11 AGND
7 8 9 10
CHGOK
ACOK
M0
M1

QFN-20 (3mmx4mm)

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

PIN FUNCTIONS
Package
Name Description
Pin #
Bootstrap. A capacitor is connected between SW and BST to form a floating supply across
1 BST
the power switch driver to drive the power switch’s gate above the supply voltage.
Switch output. Add an external 30V/1A Schottky diode from SW to GND when VIN is higher
2, 4 SW
or equal to12V and the output power include system load and battery charging is over 10W.
3 IN Power input of the IC from adapter or USB.
5 PGND Power ground.
_____ _____

6
_____
Function logic control of the IC. Drive EN to logic low to enable the part. Drive EN to logic
EN
high to disable the part.
7 M0 Mode select input. M0 sets the input current limit mode in combination with M1.
8 M1 Mode select input. M1 sets the input current limit mode in combination with M0.
_____________ _____________

9 Open-drain output. CHGOK is pulled low during charging. CHGOK is pulled high through an
_____________
CHGOK
external resistor to VCC to indicate that the charge is complete.
__________

__________
Open-drain output. ACOK is pulled low to indicate the presence of a valid input power
__________
10 ACOK supply. ACOK is pulled high through an external resistor to VCC to indicate an invalid or
removed input.
11 AGND Analog ground.
SYS voltage program. Connect a resistor divider from SYSFB to SYS and AGND to program
12 SYSFB
the system output voltage. Leave SYSFB floating to disable the function.
13 SYS DC/DC regulator output to power the system load and charge the battery.
14 BATT Positive battery terminal.
Charge current program. A resistor from ISET to AGND can program the charge current
15 ISET
during CC charging. Float ISET to disable the charge function.
Thermistor input. Connect a resistor from NTC to VCC and the thermistor from NTC to
16 NTC
ground. The thermistor is inside the battery pack.
Input current limit program. A resistor from ILIM to AGND can program the input current
17 ILIM
limit with the adapter input.
Set timer out period. Connect a 0603 ceramic capacitor from TMR to GND to set the timer
18 TMR
out period. Connect TMR pin to AGND to disable the internal timer.
19 VLIM Input voltage limit program.
20 VCC Supply voltage of the IC.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (4) θJA θJC

IN, SW ......................................... -0.3V to +20V QFN-20 (3mmx4mm) ............ 48 ....... 11 ... °C/W
BATT, SYS .................................... -0.3V to +6V
NOTES:
BST ............................................. -0.3V to +26V 1) Exceeding these ratings may damage the device.
All other pins .................................. -0.3V to +6V 2) The maximum allowable power dissipation is a function of the
Continuous power dissipation (TA = +25°C) (2) maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
QFN-20 (3mmx4mm) .................................2.6W TA. The maximum allowable continuous power dissipation at
Junction temperature ............................... 150°C any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
Lead temperature .................................... 260°C dissipation produces an excessive die temperature, causing
Storage temperature .................. -65°C to 150°C the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
Recommended Operating Conditions (3) damage.
3) The device is not guaranteed to function outside of its operating
Supply voltage (IN) ......................... 4.0V to 14V conditions.
Operating junction temp. (TJ) ... -40°C to +125°C 4) Measured on JESD51-7, 4-layer PCB.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

ELECTRICAL CHARACTERISTICS
VIN = 5.0V, TA = 25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Input Power (IN)
IN operating range VIN 4.0 14 (5) V
IN under voltage lockout Rising 3.65 3.8 3.95 V
threshold Falling 3.35 3.5 3.65 V
Rising 240 280 320 mV
IN vs. BATT threshold
Falling 40 70 120 mV
Rising 2.7 2.9 3.1 V
BST voltage threshold VBST-VSW
Falling 2.55 2.75 2.95 V
Switching frequency 1.4 1.6 1.8 MHz
USB2.0 mode 400 450 500 mA
USB3.0 mode 750 825 900 mA
Input current limit IIN
Default mode 1840 2000 2160 mA
Programmable mode, RILIM = 23kΩ 1840 2000 2160 mA
Input current limit reference
VILIM 1.1 1.14 1.18 V
voltage
High-side NMOS on
RH_DS(ON) Include the block MOSFET 120 130 mΩ
resistance
Low-side NMOS on resistance RL_DS(ON) 80 100 mΩ
High-side NMOS peak current
3.8 4.8 5.8 A
limit
Input voltage clamp threshold VVLIM Voltage on VLIM 1.49 1.52 1.55 V
Charger enabled, USB2.0 mode 2.4 5 mA
Charger enabled, USB3.0 mode 2.8 5 mA
Input quiescent current IIN Charger enable, programmable mode 3.8 5 mA
Charger enabled, default mode 3.8 5 mA
Disabled, EN = 0V 3 5 µA
SYS to IN reverse current SYS = SW = 4.5V, VIN = 0V,
0.01 0.2 µA
blocking monitor VIN leakage
SYS Output
Minimum SYS regulation SYS voltage at VBATT ≤ 3.4V,
VSYS 3.45 3.6 3.75 V
voltage SYSFB float
3.4V < VBATT ≤ 4.2V, SYSFB float, VBATT +
3.5 4.5 V
SYS regulation voltage VSYS BATT float 0.2V
Programmed by SYSFB 4.08 4.4 V
SYS reference voltage VSYS_REF 1.135 1.152 1.170 V
Battery Discharge
BATT to SYS resistance VIN = 0V, ISYS = 200mA, VBATT = 4.2V 40 50 mΩ
VSYS > VBATT - 800mV, VBATT = 4.2V 5 6.2 7.4 A
BATT to SYS current limit
SYS short 230 mA

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ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, TA = 25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Battery Charger Voltage Spec
VBATT > VRECH, ICHG ≤ IBF,
4.179 4.2 4.221 V
SYSFB float
Terminal battery voltage VBATT VSYS -
VSYS < 4.2V, programmed by SYSFB 0.04 x V
IBF
SYSFB float 3.9 4.0 4.1 V
Recharge threshold at VBATT VRECH
SYSFB programmed 3.85 3.95 4.05 V
Recharge hysteresis 85 mV
Trickle charge threshold 2.9 3 3.1 V
Trickle charger hysteresis 200 mV
Battery Charger Current Spec
Trickle charge current ITRICKLE 10% ICC
Termination charger current IBF 5% 10% 15% ICC
IBF maximum limit 150 200 mA
RISET = 760Ω 2.475 2.75 3.025 A
Constant current mode
ICC RISET = 1.53kΩ 1.26 1.4 1.54 A
charge current
RISET = 4.6kΩ 0.405 0.450 0.495 A
ISET reference voltage 1.1 1.15 1.2 V
Rising 2.4 2.6 2.8 V
Battery UVLO
Falling 2.2 2.4 2.6 V
VBATT -
Idea diode regulation voltage VSYS Supplement mode mV
65mV
BATT leakage current IBATT VBATT = 4.2V, SYS float, VIN = PGND 20 30 µA
__________ _____________
ACOK, CHGOK
__________ _____________
ACOK, CHGOK output low Sinking 5mA 270 350 mV
voltage
__________ _____________
ACOK,CHGOK leakage Connected to 3.3V 0.1 0.5 μA
current
Timer
Trickle charge time CTMR = 0.1µF, ICHG = 1A 45 Min
CC charge time CTMR = 0.1µF, ICHG = 1A 6.5 Hour
Negative Temperature Coefficient (NTC) Control
NTC low temp rising
VTHL RNTC = NCP18XH103F, 0°C 63 65 67 %VCC
threshold
Hysteresis on low temp
35 mV
threshold
NTC high temp falling
VTHH RNTC = NCP18XH103F, 50°C 32 33.5 35 %VCC
threshold
Hysteresis on high temp
70 mV
threshold

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, TA = 25C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
VCC Supply
Rising 3.15 3.35 3.55 V
VCC UVLO
Falling 2.8 3 3.2 V
VCC output voltage 0mA < IVCC < 25mA, VIN = 6V 4.3 4.5 4.6 V
VCC output current limit 40 mA
Logic
EN input low voltage 0.4 V

EN input high voltage 1.5 V

EN = 4V 4 8
EN input current μA
EN = 0V -0.5 -0.1
Logic high 1.5 V
M0, M1
Logic low 0.4 V
Protection
Thermal limit temperature 120 °C
Thermal shutdown 150 °C
NOTE:
5) A Schottky diode is required from SW to GND when Pout is higher than 10W and VIN is over 12V.

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TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 5.0V, VBATT = full range, default mode, IIN limit = 2A, VSYS = 4.4V, R6 and R7 are floating, ICHG =
2A, VIN clamp = 4.5V, L = 1.2 µH, TA = +25°C, unless otherwise noted.

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

VIN = 12V, VBATT = full range, default mode, IIN limit = 2A, VSYS = 4.4V, R6 and R7 are floating, ICHG =
2A, VIN clamp = 4.71V, L = 2.2µH, TA = +25°C, unless otherwise noted.

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

VIN = 12V, VBATT = full range, default mode, IIN limit = 2A, VSYS = 4.4V, R6 and R7 are floating, ICHG =
2A, VIN clamp = 4.71V, L = 2.2µH, TA = +25°C, unless otherwise noted.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

VIN = 12V, VBATT = full range, default mode, IIN limit = 2A, VSYS =4.4V, R6 and R7 are floating, ICHG =
2A, VIN Clamp = 4.71V, L = 2.2µH, TA = +25°C, unless otherwise noted.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

VIN = 12V, VBATT = full range, default mode, IIN limit = 2A, VSYS = 4.4V, R6 and R7 are floating, ICHG =
2A, VIN clamp = 4.71V, L = 2.2µH, TA = +25°C, unless otherwise noted.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

BLOCK DIAGRAM
BST

IN
Trim

HSG
SYSFB1
EAO
3.6V EA
Max(A,B) Converter L
control
SW SYS
VBATT+200mV Driver

M1 Input current
limit reference C
EA LSG
selector Iref
M0

EAO
VREF SYSFB
SYSFB
SYSFB
EA
VBG
ILIM

SYSFB1 SYS

VLIM
1.5V
4 0mO
VBATx 2
Charge
Pump

VIN

Ideal diode
regulation
VTH
SYS

Battery switch
BATT
current limit BATT
3.5 V coarse EN
EN LDO &
3.0 V UVLO

CC/ CV linear BATTFB

BATTFB charger

VBG
VREF_CC

VCC

Bandgap VBG
EN & Bias 4.5 V LDO
Charger Control & Chip Logic

3 .8 V UVLO UVLO
VIN

GND CHGOK ACOK TMR NTC ISET

Figure 1: Functional Block Diagram

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

OPERATION the logic inputs (M0 and M1). This ensures

compliance with the USB specifications and
The MP2617H is a switching charger IC with
prevents overloading the wall adapter.
integrated, smart, power path management for
powering the system and charging a single-cell When the input voltage is higher than the under-
battery independently and simultaneously. voltage lockout (UVLO) threshold and 280mV
higher than the battery voltage, the input voltage
The MP2617H includes an input DC/DC step- ——————

down converter for a wide range of DC sources OK signal is active (ACOK becomes low), and
and USB inputs. The MP2617H has a precision the DC/DC converter soft starts. The input power
average input current limit to make maximum is sufficient for supplying the combination of the
use of the allowable input power. This feature system load and battery charger, and the input
allows for fast charging when the charger is current limit loop is not triggered. The converter
powered from a USB port and ensures that the output voltage (VSYS) is regulated.
input current never exceeds the input power If BATT is greater than 3.4V, VSYS is
specification. Additionally, the input current limit approximately 0.2V above the battery voltage to
threshold can be programmed by the logic inputs minimize the power loss of the battery charger
or a resistor from ILIM to ground. during fast charging. If BATT is less than 3.4V,
The MP2617H implements an on-chip 40mΩ VSYS is fixed at 3.6V to power the system
MOSFET, which works as a full-featured linear immediately, even when a drained battery is
charger with trickle charge, high-accuracy, inserted to be charged (see Figure 2).
constant-current (CC) charge and constant- The system voltage can also be regulated to any
voltage (CV) charge, charge termination, auto- value between 4.08V to 4.4V in the MP2617H by
recharge, NTC monitor, built-in timer control, using a resistor divider on SYSFB (see R6 and
charge status indication, and thermal protection. R7 in Figure 10). If SYSFB is left floating, the
The charge current can be programmed by an system program is invalid, and VSYS is regulated
external resistor connected from ISET to AGND. according to BATT voltage (see Figure 2).
The IC limits the charge current when the die
temperature exceeds thermal regulation The converter adopts a fixed off-time control to
threshold. extend the duty cycle (close to 100%) when the
input of the converter is close to VSYS.
The 40mΩ MOSFET works as an ideal diode to
connect the battery to the system load when the
input power is not enough to power the system
4.4V
load. When the input is removed, the 40mΩ 4.2V
MOSFET is turned on, allowing the battery to
power up the system. VS Y S
200m V
With smart power path management, the system
3.6V
load is satisfied first, and the remaining current
is used to charge the battery. The MP2617H V B A TT

reduces the charging current or uses power from

the battery to satisfy the system load when its
demand is over the input power capacity.
DC/DC Step-Down Converter 3.4V 4.2V

The DC/DC converter is a 1.6MHz, step-down, Figure 2: SYS Regulation Output

switching regulator to provide input power to
SYS, which drives the combination of the system
load and battery charger. The regulator contains
an input current measurement and control
scheme to ensure that the average input current
remains below the level programmed via ILIM or

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At near-100% duty operation, the BST refresh error amplifier drops to control the operation
operation ensures that the driver voltage of the duty. In this mode, the input voltage is
high-side MOSFET (HS-FET) is charged by clamped according to the value set by the
turning on the low-side MOSFET (LS-FET) until resistor divider. The control to the system
the negative inductor current (IL) reaches a voltage and charge current is the same as
threshold. the input current limit control. The charge
current drops down to satisfy the system
If the input power is insufficient for supplying the
current request first. This feature provides a
combination of the system load and battery
second protection to the input power and
charger, the DC/DC converter limits the total
ensures safe operation of the input adapter.
power requirement by restricting the input
Even if the wrong adapter is inserted, the
voltage, input current, and peak current through
MP2617H can continue operating, providing
the MOSFET. The power path management
the maximum power to its load. The input
reduces the charge current to satisfy the external
voltage limit value can be programmed
system load first. According to this feature, the
through the resistor divider from IN to VLIM
USB specification is always satisfied first, even if
to AGND.
the charge current is set higher than the USB
input current limit, and the real charge current is 2. Peak-Current Limit: The peak current of the
reduced as needed. high-side switch of the DC/DC converter is
sensed during every cycle and is compared
Input Limit State
to the 4.8A reference. If the peak current
If the input power is insufficient for supplying the reaches the threshold, peak-current limit
combination of the system load and battery mode is triggered. The control of the charge
charger, the MP2617H implements three input current is the same as the input current limit
limit control loops to reduce the charge current and input voltage limit.
and satisfy the external system load first. The
input in this case might be limited with either Input Current Limit Setting
input current limit, input voltage limit, or DC/DC The ILIM current is a precise fraction of the
peak current limit. adapter input current. When a programming
resistor is connected from ILIM to AGND, the
1. Input-Current Limit: When the input current is
voltage on ILIM represents the average input
higher than the programmed input current
current of the pulse-width modulation (PWM)
limit, the input current limit loop takes the
converter. The input current approaches the
control of the converter and regulates the
programmed limit, and the ILIM voltage reaches
input current at a constant value. If the
1.14V.
battery voltage is over 3.4V, the output
voltage (VSYS) drops down according to the The average input current limit can be set
increase of the system current, and the through the resistor connected from ILIM to
charge current drops down after the BATT- AGND according to Equation (1):
to-SYS switch (40mΩ MOSFET) is fully on 40000
according to VSYS dropping down. During this IIN_LIM =1.14  (mA) (1)
RILIM (kΩ)
process, the system voltage is slightly higher
than VBATT. If the battery voltage is lower than When connected to a USB power source, the
3.4V, to maintain the minimum system input current limit is set internally, and the
voltage and ensure system operation, the programmed value is invalid. The MP2617H
input current limit control pulls down the provides a typical 450mA input current limit for
charge current directly o reduce the load of USB2.0 specification, and a typical 825mA
the converter so the system current is current limit for USB3.0 specification.
satisfied first. Input-Voltage Limit: A resistor
divider from IN to VLIM to AGND is used for The input current limit can be set through the two
input voltage limit control. When the voltage logic pins (M0 and M1) according to its input
on VLIM reaches the 1.52V reference specification (see Table 1). Both M0 and M1 are
voltage, the output of the input voltage limit pulled to logic high when floating.

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Under this condition, the input current is limited the system load requirement is low, the battery
to a default value of 2A. can be charged at a fully constant current.
Table 1: Input Current Limit Setting by M0 and When the battery voltage reaches the battery full
M1 threshold, the charger enters constant-voltage
M0 M1 Mode mode operation.
Low Low USB2.0 mode
End of Charge (EOC) and Indication
Low High USB3.0 mode
High Low Programmable mode In constant-voltage charge mode, the battery
High/float High/float Default mode voltage is regulated at 4.2V when SYSFB is
floating or SYS is programmed higher than the
battery-full threshold, and the charge current
Input Voltage Limit Setting
decreases naturally. Once the charge current
The input voltage can be limited at a value set by reaches the battery full threshold (IBF, 1/10 the
a resistor divider from IN to VLIM to AGND programmed charge current), the battery is fully
according to the Equation (2): charged, and charge cycle is terminated.
R1+R2 If the charge current drops below IBF because of
VIN_LIM =1.52  (V) (2)
R2 any limit condition, the MP2617H exits CV mode,
When the voltage on VLIM drops and reaches and the charge-full detection is invalid.
the 1.52V reference voltage, the input voltage is A safe timer starts at the beginning of each new
clamped to the setting value. charge cycle and monitors whether the entire
Battery Charger charge period is within the programmed time
limit. After each charge cycle, when the battery
The MP2617H’s complete charge operation
is indicated as full, the timer counter resets. If the
consists of trickle charge, automatic charge
time expires while the charging is still ongoing,
termination, charge status indication, timer
the timer forces the MP2617H to terminate
control, NTC indication, automatic recharge, and _____________

thermal limiting. charging. CHGOK blinks to indicate the fault

condition.
When the PWM converter exits soft start, the
battery charge cycle begins. The MP2617H first If system voltage is programmed below 4.2V by
determines if the battery is deeply discharged. If the resistor divider at SYSFB, the battery is
the battery voltage is lower than the trickle charged close to VSYS until the charge current
charge threshold (typically 3.0V), the battery reaches the IBF threshold.
charger starts in trickle charge mode. The trickle Automatic Recharge
charge current is limited to 10% of the
programmed charge current until the battery Once the battery charge cycle is completed, the
voltage reaches 3.0V. If the charge remains in MP2617H turns off, indicating the battery-full
trickle charge mode for longer than “trickle status. During this process, the battery power
charge timer period”, the timer out condition is may be consumed by the system load or self-
_____________ discharge. If the input power is always on, to
triggered, the charge is terminated, and CHGOK ensure that the battery is not exhausted, the new
starts blinking to indicate that the battery is charge cycle begins automatically when
unresponsive. When the battery voltage is above
3.0V, the charger operates in constant-current
mode. The current delivered to the battery
attempts to reach the value programmed by
ISET. Depending on the available input power
and system load conditions, the battery charger
may or may not be able to charge at the fully
programmed rate. The system load is always
satisfied first over the battery charge current. If

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

the battery voltage falls below the auto-recharge charger function, while the output of the PWM
threshold (VRCHG) when SYSFB is floating, or converter continues to supply power to the
VRCHG minus 50mV if SYSFB is not floating and system. Conversely, a resistor from ISET to
connected to a resistor divider. The timer restarts AGND enables charging at the programmed
when the auto-recharge cycle begins. charge current.
During the charge-off state when the battery is The logic control of the ISET pin of the MP2617H
fully charged, if the input power is recycled, or can be set as shown in Figure 3. In this way, logic
the EN signal is refreshed, the charge cycle low can be set as the off signal, and logic high
restarts, and the timer refreshes, even if the can be set as the on signal with an N-channel
battery voltage is above the auto-recharge MOSFET.
threshold.
Charge Current Setting ISET
OFF ON
The charge current of the MP2617H is
programmed using a single resistor from ISET to RISET
ground. The program resistor and charge current
can be calculated with Equation (3):
1800 Figure 3: ISET Logic Control
ICHG  1.15  (mA) (3) __________
RISET (k) Input Power Status Indication (ACOK)
An internal UVLO circuit monitors the input
In either constant-current mode or constant-
voltage and keeps the IC in its off state until the
voltage mode, the ISET voltage is proportional to
input rises over the rising threshold (3.8V). When
the actual charge current delivered to the battery
the input voltage decreases below the lower
(IBATT). The charge current can be calculated by
threshold (3.5V), the IC turns off, and the system
monitoring the ISET voltage with Equation (4):
load is powered by the battery automatically.
__________
VISET ACOK is an open-drain, active-low output that
IBATT = ×I (4)
1.15 CHG indicates the status of the input power. The input
is considered valid when the input voltage is over
Additionally, the actual battery charge current the UVLO rising threshold and 280mV higher
may be lower than the programmed current due than the battery voltage to ensure that both the
to the limited input power available and converter and the charger can operate normally.
prioritization of the system load. If the input voltage from an adapter or a USB port
__________
The battery charge full-current threshold (IBF) is is indicated as OK, ACOK turns low.
set internally at 10% of the programmed charge _____
current. However, IBF has a 150mA maximum During EN off or thermal shutdown conditions,
limit which cannot be exceeded. __________
ACOK turns high to indicate that no power is
__________
Logic Control
provided by the input to the system. The ACOK
The MP2617H has two separate enable control signal indicates whether the input is supplying
_____
pins. EN is a logic control pin that controls the power to the system load or not. Any other
_____ __________

operation of the entire IC. When EN is low, the condition cannot affect the ACOK indication as
IC is enabled, and the PWM converter output long as the input power is present.
_____
_____________
powers the system and the charger. When EN is Charge Status Indication (CHGOK)
high, both the PWM converter and the charger _____________
are disabled. The BATT-to-SYS switch fully turns CHGOK is an open-drain, active-low output that
_____________
on to connect the battery to power the system. indicates the status of the charge. CHGOK is low
ISET can be also used to control the operation during normal charging operation and turns high
_____________
of the charger. Floating ISET disables the after the charge is full. CHGOK blinks if a fault

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

condition occurs, including an NTC fault (battery value, the trickle charge time is calculated about
temperature is invalid) and timer out (bad 31 minutes.
battery).
The total charge time (during CC and CV mode)
_____________
In the event of a fault condition, CHGOK is:
switches at 6Hz with a 50% duty cycle and t Total_TMR  3407871 t Cycle (s)
enters blinking mode. Check the application
circuit to find the root cause of the fault condition If a CTMR (0.1µF) is connected, the CC charge
if the blinking signal is asserted. current is 1A, and suppose the capacitance and
_____________
For no-battery conditions, CHGOK blinks battery current is fixed at this value, the CC
according to the transition between charging and charge time is calculated about 5.3 hours.
charge full. The blinking frequency is determined During CV mode, as the charge current
by the charge and discharge cycle of the output decrease naturally, so the timer cycle increases
capacitor. naturally according to the formula. The time
If the charge current to the battery is low or if the period also will increased during CV mode. The
battery is in supplement mode caused by battery is closer to full state, the timer period is
_____________ longer.
insufficient input power, CHGOK remains low to
avoid providing a false charge-full indication. As a result of power path management control,
__________ _____________
charge current might vary during normal
Table 2 shows the ACOK and CHGOK status operation, under this condition, the MP2617H
under different charge conditions. automatically takes into account this variation
and adjust the timer period accordingly.
Table 2: Charger Status Indication
__________ _____________
Charger Status
If charge is stopped due to high system load, the
ACOK CHGOK timer is temporarily suspended. This feature
In charging, supplement avoids indicating a false trigger indication for bad
Low Low
mode battery indication when there is little charge
End of charge, ISET current delivered to the battery as a result of the
Low High
disable charger only
insufficient input power.
Blinking at
Low NTC fault, timer out
6Hz When the timer out condition occurs, the
_____
VIN absent, EN disable, MP2617H terminates the charge at once and
High High _____________
thermal shutdown CHGOK blinks to indicate the fault status. If one
Timer Setting of the following events happens, the timer is
refreshed and MP2617H re-starts the charge
The MP2617H uses an internal timer to cycle.
terminate charge if the timer times out. The timer
duration is programmed by an external capacitor  Input re-startup
at the TMR pin and related to the real battery _____

current (IBATT).  Refresh EN /ISET signal

C TMR  0.73  2  Auto-Recharge

t Cycle  (s)
I BATT Battery Temperature Monitor
 1 10 -6

40000 The MP2617H continuously monitors battery’s

temperature by measuring the voltage at the
The trickle mode charge time is:
NTC pin, typically determined by a negative
t Trickle_TMR  45055  t Cycle(s) temperature coefficient (NTC) thermistor and
external voltage dividers, as shown in Figure 5.
If a CTMR (0.1µF) is connected, the trickle charge Both the external voltage divider and the internal
current is just 0.1A, and suppose the reference voltage divider are pulled up to the
capacitance and battery current is fixed at this same power pin. So actually, the voltage ratios
between the internal and external dividers are

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compared. For the NTC thermistor, the hotter Icc

ambient temperature, the lower resistance is, Charge
Current
which corresponds to a lower voltage ratio, vice
versa.

VBATT_REG
VCC
Low Temperature Charge
RT1 Threshold Voltage
VTH_COLD
NTC NTC
Protection
RNTC RT2
High Temperature
Threshold
VTH_HOT
COLD HOT

Figure 5: NTC Protection Circuit Figure 6: Standard NTC Window

According to Figure 5， the following equations Thermal Protection

are list:
The MP2617H implements thermal protection to
prevent thermal damage to the IC or surrounding
VTH_COLD R T2 //R NTC_LOW components. An internal thermal sense and
VTHL = =
VCC R T1 +R T2 //R NTC_LOW feedback loop decrease the charge current
automatically when the die temperature rises to
VTH_HOT R T2 //R NTC_HIGH about 120°C. This function is referred to as the
VTHH = =
VCC R T1 +R T2 //R NTC_HIGH charge current thermal fold-back. This feature
protects the MP2617H from excessive
temperature due to high-power operation or high
VTHL actually means the low temperature ambient thermal conditions. Another benefit of
threshold limit ratio (Cold Limit) and VTHH means this feature is that the charge current can be set
the high temperature threshold limit ratio (Hot according to the requirement rather than the
Limit). RNTC_LOW means the resistance of the worst-case condition for a given application with
selected NTC thermistor under low temperature, the assurance of safe operation. The MP2617H
while RNTC_HIGH means the resistance of the stops charging if the junction temperature rises
selected NTC thermistor under high temperature. above 150°C as the IC enters thermal shutdown
Once the external voltage ratio exits the low protection.
temperature threshold (VTHL) to high temperature Ideal Diode Mode
threshold (VTHH) range, it means the battery If the system current requirement increases such
temperature is out of the COLD to HOT range, that the pre-set input current limit of the PWM
the IC suspends charging and reports the NTC converter is reached and the charge current has
fault. Charging resumes automatically after the reduced to zero, the additional current will be
battery temperature is within the COLD to HOT drawn from the battery via the BATT-to-SYS
temperature range again. Figure 6 shows the switch. To avoid very large currents from being
standard control. drawn from the battery which might affect the
reliability of the device, the MP2617H controls
the battery MOSFET to work in the ideal diode
mode. When VSYS drops to 40mV lower than
VBATT, then the MP2617H will enter ideal diode
mode and regulate VSYS to VBATT - 65mV. After
the system load decreases and VSYS is 40mV
higher than VBATT, the battery MOSFET exits

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

ideal diode mode, and the charge cycle restarts Dynamic Power Path Management (DPPM)
softly. In the presence of a valid input source, the PWM
converter supplies current to both the system
VBATT-40mV
Enable Ideal Diode Mode and the battery charger.
The voltage (VSYS) is regulated based on the
VSYS value of the battery voltage. When VBATT is higher
than 3.4V, VSYS is regulated 200mV above VBATT
Disable Ideal Diode Mode
to charge the battery. When VBATT is lower than
VBATT+40mV 3.4V, VSYS is regulated at a constant 3.6V to
ensure that the system can still be powered up,
Figure 4: Ideal Diode Mode Enable/Disable even with a drained battery connected.
When the input source is overloaded, either the
Battery Discharge Protection current exceeds the input current limit or the
When the input power is removed or invalid, the voltage falls below the input voltage limit. The
system load draws power from the battery via the MP2617H then reduces the charge current until
battery switch. Under this condition, the battery the input current falls below the input current limit
switch is fully on to minimize power loss. The and the input voltage rises above the input
MP2617H integrates battery discharge voltage limit. If the system current increases
protection. If the battery discharge current is beyond the power allowed by the input source,
larger than the discharge current limit threshold additional power is drawn from the battery via an
(IDIS, 6.2A), the current is regulated at the pre-set on-chip 40mΩ MOSFET working as an ideal
limited value. If the current increases further, the diode. If the system current increased further,
SYS voltage starts to decrease. When VSYS when the discharge current times the Ron is over
drops to about 800mV below VBATT, a SYS short 65mV, the VSYS can not be regulated, the BATT
condition is detected. Under this condition, the to SYS MOSFET just turned fully on, the battery
discharge current is limited at 230mA. In the powers the system together with the converter
event of a short from the system to GND, the from VIN as the supplement mode.Additionally,
discharge current from the battery to the system if the input source is removed, the MP2617H
is also limited to 230mA. turns on the 40mΩ MOSFET, allowing the
The battery voltage UVLO is always monitored. battery to power the system load to maintain the
If the battery voltage is lower than the battery operation of the portable device.
UVLO threshold, the battery switch is turned off Operation Flow Chart
immediately. This feature prevents the battery Figure 5 shows the operation flow chart of the
from being over-discharged. MP2617H. Figure 6 shows the operation process.

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

POR

Chip Enable?

Yes No

VIN>3.0V?
No，
Yes, POR="1"
POR="0"

Enable BG
Yes Battery power system
VBATT>VBATT_UVLO?
BGOK="0" Enable discharge limit
BGOK="1"
No
Enable VREF LDO
System shuts down
V IN>VIN_UVLO (VTH)?
No power to system
No,
Yes, UVLO="1"
UVLO="0"

V IN>VBATT+280mV?

Yes

Enable DC-DC
DC-DC soft starts

VSYS_REF=max(VBATT+
200mV,3.6V

VSYS>VBATT ?
ISET OK?
No
Yes

Battery power
system switch
turns off

DC-DC starts ready?

No
Yes

Enable Battery
Charger

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

Yes Clamp DC-DC

Any Limit condition EAO to regulate
triggered? the part
at the limit state
No

VBATT<3.4V?
VBATT>3.0V?
No Yes
No Trickle Charge
Yes ICHG=10%ICC VSYS drops down,
Decrease ICHG,
Charge switch
CC/CV Charge Keep VSYS=3.6V
is fully on

Yes

No Limit condition No Satisfy System current

ICHG=IBF? Removed? Charge the battery with
remaining current

Yes No
Disable
No Charge in No Ideal Diode Mode
Charge Full, EOC=1 Yes CV mode and ICHG=0?
TMR off, ICHG<IBF?
clear the counter
DC-DC keeps work Yes
Yes
No
VSYS<VBATT-40mV? VSYS>VBATT+40mV?
VSYS<VBATT-40mV?
Yes
Yes
Yes No
No VBATT>VBATT_UVLO?
No

VBATT<VRCHG? Yes

Ideal Diode Mode: Battery switch shuts down,

VSYS=VBATT-65mV, DC-DC in over load
Enable discharge condition,
current limit VSYS drops down

Figure 5: MP2617H Operation Flow Chart under No Fault Condition

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

Normal
operation
voltage
UVLO
UVLO
Threshold-Hys
Thresohold

VIN
0

Power Path Management

Battery
Supplement
Mode

ISYS

CC Charge CV Charge
Trickle Charge

IBATT Battery
Full
0

ISYS - I IN_LIM
Input Power
Current Limit

I IN_LIM

IIN_AVE
0
Supplement
Self- Auto - Power off -
Mode-
Charging Charging discharging Rec harging discharging
Discharging

VBATT=4.0V
V SYS

VBATT VBATT =3.0V V BATT=3.4V

Figure 6: MP2617H Operation Process under No Fault Condition

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 MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH

APPLICATION INFORMATION then the RSET is calculated at 1.05kΩ. The

tolerance of the ICHG setting is ±10%. If the
Setting the Input Current Limit
minimum or maximum charge current is required,
First the input current limit can be set by the M0 first the typical value should be calculated
and M1 pins refer to the Table 1, the exact according to the tolerance. After that, calculate
current value in minimum, typical and maximum the resistor according to formula (3). 1%
is listed in the EC table. accuracy resistor is used for this setting.
Under program mode, connect a resistor (RILIM) For a given setting resistor, the charge current
from ILIM to AGND to program the input current can be calculated by the same way did in the
limit for different input ports. The relationship input current limit setting. Usually in USB mode,
between the input current limit and resistor value the charge current is always set over the USB
is as the following formula from Equation (1): input limit specification. Then the MP2617H
40000 (1) regulates the input current constant at the
IIN_LIM =1.14  (mA)
RILIM (kΩ) limitation value. Therefore, the real CC charge
The tolerance is ±8% of the input current limit current is not the setting value and varies with
setting. different input and battery voltages.
So for a required minimum input current limit The maximum CC charge value can be
value, just calculate its typical value first, then calculated with Equation (7):
calculate the setting resistor based on Equation VIN  IILIM  
(1). Also the maximum value can be calculated ICC _ MAX  (A) (7)
according to the tolerance. 1% accuracy resistor VTC
is used for this setting. Where VTC is the trickle charge threshold (3V),
Also, for a given resistor of RILIM, the input current and η is the current charge efficiency. If VIN is
limit can be calculated. Following table is an 5.5V, IILIM is 1.5A, η is 83%, then ICC_MAX is 2.28A.
example: Figure 7 shows a calculating charge current
Table 3: Example of RILIM setting curve by limiting the input current limit based on
RILIM IIN_LIM the MP2617H.
Resistor 8% -8%
(kΩ) (mA)
Typ. 54.9 830.601 897.049 764.153 3A IIN_
ICC_MAX
L IM =2
A
Min. 54.351 838.991 906.11 771.872
Charge Current

IIN _
Max. 55.449 822.377 888.168 756.587 L IM =1 .
5A
2A
Therefore, if customer selected a 54.9k in 1% IU S
B 3. 0 =0 .9
A
accuracy resistor for the input current limit
IUS B
setting, then the typical input current limit value 1A 2.0 = 0.4 5
A

is 830.6mA, the minimum is 756.6mA and the

maximum is 906mA.
Setting the Charge Current 3V 4.2V
Battery Voltage
A resistor (RISET) connected from ISET to AGND
sets the charge current (ICHG). The relationship Figure 7: ICHG Variation with Different Input
Current Limit
between the charge current and setting resistor
is shown in Equation (3): Setting the Input Voltage Limit
1800 The input clamp voltage is set using a resistive
ICHG  1.15  (mA) (3) voltage divider from the input voltage to VLIM pin.
RSET (k) The voltage divider divides the input voltage
For example, if the typical ICHG is designed as 2A, down to the limit voltage with the ratio in
then the RSET is calculated at 1.05kΩ. For Equation (8):
example, if the typical ICHG is designed as 2A,

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R2 selected for the R5 and R6.

VVLIM = VIN_LIM × (V) (8)
R1+ R2 Be noted that, the minimum VSYS is limited to be
The input voltage can be calculated with higher than the maximum value of the auto-
Equation (10): recharge threshold, which is 4.05V.
Selecting the Inductor
R1+ R2
VIN_LIM = VVLIM × (V) (9) Inductor selection trades off among cost, size,
R2 and efficiency. A lower inductance value
The voltage clamp reference voltage (VVLIM) is corresponds to a smaller size, but results in
1.52V, and R2 is typically 10kΩ. With this value, higher ripple currents, higher magnetic
calculate R1 with Equation (11): hysteretic losses, and higher output
capacitances. From a practical standpoint, the
VIN_LIM - VVLIM inductor ripple current does not exceed 30% of
R1 = R2 × (V) (10)
VVLIM the maximum load current under worst cases
conditions. For example, if the ICHG is setting to
For example, for a 4.65V input limit voltage, R2 3A in MP2617H, then, ΔIL is general set at 0.9A.
is 10kΩ, and R1 is 20.6kΩ.
However, for the light load condition, the inductor
The minimum value and the maximum value of ripple current will be very small which may cause
the input voltage limit can be calculated unstable operation due to the peak current mode
according to the accuracy of the resistor and the control of the IC. For stable operation, the
tolerance of VVLIM. 1% accuracy resistors are experienced minimum limit value for inductor
used for R1 and R2. current ripple is 0.5A. Therefore, the inductor
Setting the System Voltage current ripple is the maximum one of 30% times
ICHG and 0.5A.
The system voltage can be regulated to any
value between 4.08V to 4.4V by the resistor And the inductance can be calculated according
divider on SYSFB, shown as R6 and R7 in to Equation (13):
Figure 10. Calculate VSYS with Equation (11): VIN  VBATT VBATT
L (µH) (13)
R6  R7 IL _ MAX VIN  fS (MHz )
VSYS  VSYS _ REF  (11)
R7
The peak current of the inductor is calculated
Where VSYS_REF is the reference voltage of SYS as Equation (14):
(1.152V). With a typical value for R7 (10kΩ), R6
%ripple
can be determined with Equation (12): IPEAK  ILOAD(MAX )  (1  ) (mA) (14)
2
VSYS  VSYS _ REF
R6  R7  (V) (12) Where VIN, VSYS, and fS are the input voltage, the
VSYS _ REF
SYS output voltage, and the switching frequency,
For example, for a 4.2V system voltage, R7 is respectively.
10kΩ, and R6 is 26.5kΩ. 1% resistors are Following Table 4 provides the selection guide of
the inductance based on different input voltage.

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Table 4: Inductance Selection Guide under different Input Voltage

SPEC Inductance Selection
LMIN LMAX L Saturation DCR
VIN (6) Package
V V V (uH) (uH) (uH) Current (A) (mΩ)
L IN SYS SYS
Application
5V IL VIN  fS (MHz) 0.367 1.25 1.0 >3.95 <50
Required
ΔIL=max (0.3*ICHG,0.5A) Application
9V ΔILMIN=0.5A 1.5 2.8 2.2 >3.95 <50
Required
ΔILMAX=0.9A Application
12V 1.75 3.5 2.2 >6(7) <50
Required

For the condition that VIN is higher or equal to Selecting the Output Capacitor
12V, and the total output power including system The output capacitor (CSYS) from the typical
load and battery charging is over 10W, an 1A application circuit is parallel with the SYS load.
schottky diode from SW to GND is required. The CSYS absorbs the high-frequency switching ripple
voltage rating of the schottky diode is usually current and smoothes the output voltage. Its
selected at 30V. impedance must be much less than that of the
Selecting the Input Capacitor system load to ensure that it absorbs the ripple
current properly.
The input capacitor (CIN) from the typical
application circuit absorbs the maximum ripple Ceramic capacitors are recommended for their
current from the PWM converter, which is given lower ESR and smaller size, which allows the
by Equation (15): ESR of the output capacitor to be ignored. The
output voltage ripple can be calculated with
VSYS _ MIN  (VIN _ MAX  VSYS _ MIN ) (15) Equation (16):
IRMS _ MAX  ICC _ MAX 
VIN _ MAX
VSYS
1
For ICC_MAX = 3A, VSYS_MIN = 3.6V, VIN_MAX = 14V, VSYS VIN
r   % (16)
the maximum ripple current is 1.3A. Select the VSYS 8  C2  fS  L
2

input capacitors so that the temperature rise

To guarantee ±0.5% system voltage accuracy,
caused by the ripple current does not exceed
the maximum output voltage ripple must not
10°C. Ceramic capacitors with X5R or X7R
exceed 0.5% (e.g.: 0.1%). The maximum output
dielectrics are recommended because of their
voltage ripple occurs at the minimum system
low ESR and small temperature coefficients. For
voltage and the maximum input voltage.
most applications, use a 10µF capacitor. When
input voltage is over 10V, 22uF capacitor is used The output capacitor can be calculated with
for CIN. Equation (17):
V
Besides, usually a small cap with at least 1uF 1  SYS _ MIN
(C1) from IN to GND is required to be put as VIN
CSYS  (17)
much close as possible to the IC. 8  fS  L  r
2

For the input voltage is high to 14V, consider the

When SYSFB pin is floating, output voltage
spike when input insert, select the input ripple is the main concern to select the output
capacitors (both the 22uF and 1uF) in 25V rating. capacitor (CSYS), refer to Table 5 for detail
selection guide about the SYS capacitance
selection under typical inputs.

NOTE:
6) Saturation Current of the inductor should be higher than the IPEAK, add 0.5A margin here.
7) This requirement is for SYS short protection consideration. It could be >3.95A as usual if this feature is not included in the application.

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Table 5: SYS Capacitance Selection Guide

SPEC SYS Capacitance (CSYS) Selection

VIN VSYS CSYS_MIN (uF) 8) CSYS_MIN (uF) 8) Temperature Package

1 When SYSFB is When SYSFB is Characteristic
VIN
CSYS  Floating Programmed
5V 8  fS  L  r
2
Application
Δr=0.1% 13.6 20 X5R;X7R Required
L=1uH @VIN=5V
9V Application
L=2.2uH @VIN=9V 13.3 20 X5R;X7R Required
L=2.2uH @VIN=12V
12V Application
15.5 20 X5R;X7R Required

When SYSFB is programmed using external R T2 //R NTC_LOW

=65% (14)
resistors, the control loop function is changed. A R T1 +R T2 //R NTC_LOW
zero point is added around the cross over
frequency of the DC gain, and this may result in R T2 //R NTC_HIGH
=33.5% (15)
the phase margin varied a lot, which may cause R T1 +R T2 //R NTC_HIGH
the unstable operation. To avoid this condition, a
The two resistors RT1 and RT2 allow the high
minimum capacitance requirement should be
temperature limit and low temperature limit to be
satisfied to make the pole point to compensate
programmed independently. With this feature,
the zero point. This minimum capacitance is
MP2617H can fit most type of NTC thermistors
20uF for a general application.
and different operation temperature range
So, for the SYSFB programmed condition, the requirement.
CSYS should be selected as max (CSYS_MIN, RT1 and RT2 can be calculated according to
20uF), CSYS_MIN is calculated from the formula of different type of NTC thermistor, operation
equation (17), as shown in Table 5. For better temperature range and equation (14) and (15).
stability margin, select a 47uF ceramic We also provide calculation tool for convenient
capacitor with 6.3V and above voltage rating as design.
the output capacitor in this case.
For example, if the thermistor NCP18XH103 is
Resistor Choose for NTC Sensor selected, and the application requires 0oC to
According to formulas in “Battery Temperature 50oC operation temperature range. Check the
Monitor”, the low and high temperature datasheet of NCP18XH103 to get the following
threshold ratio of MP2617H is 65% and 33.5%, information:
so we can get the following: At 0oC, the RNTC_LOW=27.219kΩ
At 50oC, the RNTC_HIGH=4.161kΩ
Using the calculation tool to calculate
RT1=7.11kΩ and RT2= 25.61kΩ. Then select the
most closing 1% accuracy resistance for RT1 and
RT2.

NOTE:
8) For different voltage rating, capacitance will have different DC bias characteristic. Suppose a general condition, capacitance drops
40% under VSYS=4.4V under 10V rating, and 50% at 6.3V rating.

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PCB Layout Guidelines

Efficient PCB layout is critical for specified noise,
efficiency, and stability requirements. For best
performance, follow the guidelines below.
1) Route the power stage adjacent to its ground.
2) Minimize the high-side switching node (SW,
inductor) trace lengths in the high-current
paths and the current sense resistor trace.
3) Keep the switching node short and away
from all small control signals, especially the
feedback network.
4) Place the input capacitor as close to IN and
PGND as possible.
5) Place the output inductor close to the IC.
6) Connect the output capacitor between the
inductor and PGND of the IC.
7) Connect the balls for the power pads (IN, SW,
SYS, BATT, and PGND) to as much copper
on the board as possible for high-current
applications.
This improves thermal performance because
the board conducts heat away from the IC.
8) Connect the PCB ground planes directly to
the return of all components through vias.
9) Place vias inside the PGND pads for the IC if
possible.
A star ground design approach is used to keep
circuit block currents isolated (high-power/low-
power small signal), which reduces noise-
coupling and ground-bounce issues. A single
ground plane with a small layout produces no
ground bounce issues, and segregating the
components minimizes coupling between
signals.

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TYPICAL APPLICATION CIRCUITS

ON OFF

VILIM M0 M1 EN
5V Input IN SW L SYS Load
1.0uH
C1 R3 2k C3
1uF CHGOK BST CSYS
R1 R4 2k 100nF
21k ACOK SYS 22uF
VCC
MP2617H SYSFB
CIN RT1
10k NTC PGND
10uF R2 C2
ICHG
10k 1uF RT2 BATT
TMR
vBATT
10k
CTMR CBATT
ISET
100nF AGND ILIM 22uF
RISET
RILIM 1.05k
30.9k
0

Figure 9: Typical Charge Application Circuit for 5V input

Table 6: The Key BOM of Figure 9.

Qty Ref Value Description Package Manufacture

Ceramic Capacitor;10V;
1 CIN 10μF 1206 Any
X5R or X7R
Ceramic Capacitor;10V;
1 C1 1μF 0603 Any
X5R or X7R
Ceramic Capacitor;6.3V;
1 C2 1uF 0603 Any
X5R or X7R
Ceramic Capacitor;16V;
1 C3 100nF 0603 Any
X5R or X7R
Ceramic Capacitor;6.3V;
1 CTMR 100nF 0603 Any
X5R or X7R
Ceramic Capacitor;10V;
2 CSYS,CBATT 22uF 1206 Any
X5R or X7R
2 RT1,RT2 10k Film Resistor;1% 0603 Any
Inductor;1.0uH;Low
1 L1 1.0μH SMD Any
DCR;ISAT>3.95A

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TYPICAL APPLICATION CIRCUITS

ON OFF
R5 100k
VILIM M0 M1 EN
12V Input IN SW L SYS Load
C3 2.2uH
C1 R3 2k
BST D1
1uF CHGOK 100nF CSYS
R1 R4 2k
21k ACOK SYS R6 C4 22uF
26.5k
VCC R7 4.7uF
MP2617H SYSFB
CIN RT1 10k
10k NTC PGND
22uF R2 C2
ICHG
10k 1uF RT2 BATT
TMR
vBATT
10k
CTMR CBATT
ISET
100nF AGND ILIM 22uF
RISET
RILIM 1.05k
15.4k
0

Figure 10: Typical Charge Application Circuit for 12V Input and 3A Total System Load

Table 7: The Key BOM of Figure 10.

Qty Ref Value Description Package Manufacture
Ceramic Capacitor;25V;
1 CIN 22μF 1206 Any
X5R or X7R
Ceramic Capacitor;25V;
1 C1 1μF 0603 Any
X5R or X7R
Ceramic Capacitor;
1 C2 1uF 0603 Any
6.3V; X5R or X7R
Ceramic Capacitor;25V;
1 C3 100nF 0603 Any
X5R or X7R
Ceramic Capacitor;10V;
1 C4 4.7uF 0603 Any
X5R or X7R
Ceramic Capacitor;
1 CTMR 100nF 0603 Any
6.3V;X5R or X7R
Ceramic Capacitor;10V;
2 CSYS,CBATT 22uF 1206 Any
X5R or X7R
1 R6 26.5k Film Resistor;1% 0603 Any
3 RT1,RT2,R7 10k Film Resistor;1% 0603 Any
Inductor;2.2uH;Low
1 L1 2.2μH SMD Any
DCR;ISAT>6A
1 D1 30V,1A 30V,1A,schottky diode SMD Any

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PACKAGE INFORMATION
QFN-20 (3mmx4mm)

PIN 1 ID PIN 1 ID
MARKING 0.10 X 45°TYP

PIN 1 ID
INDEX AREA

TOP VIEW BOTTOM VIEW

SIDE VIEW

0.10 X 45°
NOTE:

1) ALL DIMENSIONS ARE IN MILLIMETERS.

2) EXPOSED PADDLE SIZE DOES NOT INCLUDE
MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.

RECOMMENDED LAND PATTERN

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Revision History
Pages
Revision # Revision date Description
Updated
1. Update the “Timer Setting” description as MP2625B P4
R1.04 8/14/2020
did.
2. Update the “Battery Temperature Monitoring” as P19,P20
R1.04 8/14/2020
MP2625B did.
3. Update the “Resistor choose for NTC sensor” ad P28
R1.04 8/14/2020
MP2625B did.

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume
any legal responsibility for any said applications.

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