Lab 1 Familiarization With Digital Logic Gates
Lab 1 Familiarization With Digital Logic Gates
Group No.:
This lab activity has been designed to familiarize the beginning students with the concept of logic gates and IC
chips as well as using a breadboard and testing of logical circuits.
Objectives:
Familiarize the students with ICs, their categories and different logic families
Identify ICs on the basis of series number as well as their functional behavior and pin numbers
Search data sheets of ICs from different sources and optimally use them in the design of digital circuits
Build digital circuits using the hardware
Use Proteus to make digital circuits
Lab Instructions:
This lab activity consists of lab tasks which must be performed by the students and the
results provided in the report
The lab manual handout will be uploaded on LMS before scheduled lab date. The students
must download the handout for the lab
The students will start the lab task and demonstrate design steps separately for step-wise
evaluation
Remember that a neat logic diagram with pins numbered and nicely patched circuit will
simplify trouble-shooting/fault diagnostic process
After completion of lab, the students are expected to unwire the circuit and deposit back
components to lab staff
The students will complete lab tasks within the prescribed time and submit complete report on
LMS
There might be a viva/quiz session after demonstration for which students will be graded
individually
Breadboard:
Breadboards are usually used for patching small circuits and prototypes. A typical breadboard would look like this.
The points in ABCDE (and FGHIJ) grid are vertically connected as indicated by red circle. So all 5 points on the line
are actually the same point (node). It makes no difference whether you connect a wire on any one of these
points. The next vertical strip is a different point and so on.
It should be noted that upper and lower grids are horizontally connected indicated below. Each grid consists of 4
such separate horizontal strips:
IC Placement on Breadboard
A typical 14 pin IC placement on such a bread board is shown below:
The upper and lower horizontal strips are normally served for power (+5V) and ground (0V) respectively. But it is
not necessary to do so.
Procedure:
1. Make sure the trainer board is switched off while you are patching the circuit.
2. Make a neat schematic diagram clearly mentioning the IC numbers, PIN configurations and connections
between different ICs.
3. Place the IC(s) such that the Notch is towards the left.
4. Provide the ground connection(s) by connecting the GND pin(s) of the IC(s) to 0 V on your trainer board
power supply with the help of jumping wires. Make sure that all the ICs are properly grounded.
5. Provide the VDD or operating voltage to each IC by connecting its VDD (or VCC) terminal to +5V on your
trainer board power supply.
6. Patch the circuit as per the schematic.
7. Connect the inputs of your circuit to the logic switches provided on your trainer board. Typically, there are
8 such switches provided. The low position of the switch indicates a 0 logic level (0V) and the high position
a logic level of 1(+5V).
8. Connect the output of your circuit to the logic probe provided on the trainer board.
9. Now switch on the trainer board and give the input sequence to your circuit with the help of logic
switches. It is a good practice to give the input sequence in ascending order like this:
000, 001, 010, 011, 100, 101, 110, 111 (Here, the number of inputs is 3).
This pattern can be adopted for lesser or more number of inputs.
10. Observe the output of your circuit against different inputs and record them in the truth table.
11. Compare with theoretical values and debug the circuit if needed.
12. Show your work for each lab task to your Lab Instructor.
13. Give your observations and conclusion.
1. Digital ICs can be categorized according to the complexity of their circuits usually termed as scale
integration. The following are the six major categories. Give their full names and range of gates
available in each of them.
SSI
MSI
LSI
VLSI
ULSI
GSI
2. Another categorization is with respect to the Logic Families of Digital ICs. The seven of these are
listed below. Give their full name and give their utilization in terms of speed, power etc. (e.g. Low
Power, High Speed).
RTL
DTL
ECL
TTL
ECL
CMOS
IC Pin Numbers:
TOP VIEW
Most of the ICs have a Notch (or sometimes a dot) to denote the start of the PIN numbering. Place the IC such that
the Notch is on left side, then the lower left PIN is numbered 1 and the numbering continues in the anticlockwise
direction.
4. Show the correct pin numbering and connection of gates inside these blank chips with the help of
their datasheets.
Procedure:
1. Make a schematic layout diagram in the space provided below, showing ICs pin numbers and
their connections to form the logic circuit.
2. Plug in all ICs in bread board and power the ICs providing ground and VCC=5V to appropriate
pins. The ground pin is to be connected first and then any other connections are made.
3. By looking at pin configuration apply input signals from a switch on logic lab. Connect the output
to LED for display. The operation of circuit is verified and results to be shown to teacher or Lab
Asst. For trouble shooting of circuit use the logic probe provided in the lab.
4. Make the truth tables in the space provided below:
5. Mention the full names of each IC provided to you with the help of its datasheet and explain the
naming convention (You should be able to get this information from the internet).
8. Simulate the following circuit on Proteus and perform it on hardware. Submit screenshot
from Proteus and picture of the hardware circuit that you have built. Additionally, fill in the
truth table for this circuit.
Truth Table: