Infineon FS01MR08A8MA2LBC DataSheet v01 00 EN-3450288
Infineon FS01MR08A8MA2LBC DataSheet v01 00 EN-3450288
Infineon FS01MR08A8MA2LBC DataSheet v01 00 EN-3450288
Final datasheet
HybridPACK™ Drive G2 module with SiC MOSFET
Features
• Electrical features
- VDSS = 750 V
- IDN = 620 A
- New semiconductor material - silicon carbide
- Low RDS,on
- Low switching losses
- Low Qg and Crss
- Low inductive design
- Tvj,op = 175°C
- Short-time extended operation temperature Tvj,op = 200 °C
• Mechanical features
- 4.2 kV DC 1 second insulation
- High creepage and clearance distances
- Compact design
- High power density
- Direct-cooled PinFin base plate
- High-performance Si3N4 ceramic
- Guiding elements for PCB and cooler assembly
- Integrated temperature sensing diode
- PressFIT contact technology
- RoHS compliant, lead-free
- UL 94 V0 module frame
Potential applications
• Automotive applications
• (Hybrid) electrical vehicles (H)EV
• Motor drives
• Commercial, construction and agricultural vehicles (CAV)
Product validation
• Qualified according to AQG 324, release no.: 03.1/2021
Description
T1 T3 T5 TS1
TS2
T2 T4 T6
TS3
Datasheet Please read the sections "Important notice" and "Warnings" at the end of this document Revision 1.00
www.infineon.com 2024-03-14
FS01MR08A8MA2LBC
HybridPACK™ Drive G2 module
Table of contents
Table of contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Body diode (MOSFET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5 Characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7 Package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8 Module label code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
1 Package
Table 1 Insulation coordination
Parameter Symbol Note or test condition Values Unit
Isolation test voltage VISOL RMS, f = 0 Hz, t = 1 sec 4.20 kV
Material of module Cu+Ni1)
baseplate
Internal isolation basic insulation (class 1, IEC 61140) Si3N4
Creepage distance dcreep terminal to heatsink 9.5 mm
Creepage distance dcreep terminal to terminal 9.5 mm
Clearance dclear terminal to heatsink 4.5 mm
Clearance dclear terminal to terminal 4.5 mm
Comparative tracking CTI > 175
index
1) Ni plated Cu baseplate
2 MOSFET
Table 4 Maximum rated values
Parameter Symbol Note or test condition Values Unit
Drain-source voltage VDSS continuous 750 V
operation
10h over life time 900
DC drain current ID,nom VGS = 18 V, Tf = 65 °C Tvj,max = 175 °C 620 A
Pulsed drain current ID,pulse verified by design, tp limited by Tvj,max 1240 A
Gate-source voltage, max. VGS -5/19 V
static voltage
Gate-source voltage, max. VGS Duty Cycle < 1 % (first transient maximum -10/23 V
transient voltage peak)
VDSS-LsDS⋅di/dt
RG,off = 4.2 Ω, VDSmax =
Short circuit data ISC VDD = 470 V, VGS = -5/15 V, tSC = 2 µs, 6500 A
RG,on = 10.5 Ω, Tvj = 200 °C
VDSS-LsDS⋅di/dt
RG,off = 4.2 Ω, VDSmax =
ΔV/Δt = 10 dm³/min, Tf = 60 °C
Thermal resistance, Rth,j-f per MOSFET, 50% water / 50% ethylenglycol, 0.107 0.1183) K/W
junction to cooling fluid2)
Temperature under Tvj,op continuous -40 175 °C
switching conditions operation
extended 2004)
operation
1) At 0h operating time. During inverter operation the value can be lower depending on Tvj, VGS(off), (switching frequency) fsw over lifetime.
For a final assessment of VGS,th Min. value depending on customer application please contact the Infineon sales office for the necessary
technical support by Infineon.
2) Cooler design and flow direction according to application note AN-G2-ASSEMBLY
3) EoL criteria see AQG324, verified by characterization with 4.5 sigma
4) For 100h cumulated over life time
4 Temperature sensor
Table 9 Characteristic values
Parameter Symbol Note or test condition Values Unit
Min. Typ. Max.
Transient sense current ITS 10 mA
Forward voltage VTS ITS = 0.2 mA, 2.574 2.624 2.674 V
Tvj = 25 °C
ITS = 0.2 mA, 2.169 2.234 2.299
Tvj = 85 °C
5 Characteristics diagrams
Pressure drop in cooling circuit (typical), Package Maximum allowed drain-source voltage, MOSFET
Δp = f(ΔV/Δt) VDSS = f(Tvj)
fluid = 50% water / 50% ethylenglycol , Tf = 60 °C verified by characterization / design, not by test
150 1000
120 900
90 800
60 700
30 600
0 500
4 5 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 150 175 200
930 1085
620 930
310 775
0 620
-310 465
-620 310
-930 155
-1240 0
-3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 0.0 0.4 0.8 1.2 1.6 2.0
2.10 2.10
1.80 1.80
1.50 1.50
1.20 1.20
0.90 0.90
25 50 75 100 125 150 175 200 -1240 -620 0 620 1240
1085 15
930 12
775 9
620 6
465 3
310 0
155 -3
0 -6
2 4 6 8 10 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
100 60
50
10 40
30
1 20
10
0.1 0
0 150 300 450 600 750 0 310 620 930 1240
18
125
16
14
100
12
75 10
8
50
6
4
25
2
0 0
0 5 10 15 20 25 30 0 310 620 930 1240
18
10
16
14
8
12
10 6
8
4
6
4
2
2
0 0
0 5 10 15 20 25 30 0 310 620 930 1240
Voltage slope (typical), MOSFET Reverse bias safe operating area (RBSOA), MOSFET
dv/dt = f(RG) ID = f(VDS)
ID = 620 A, VDS = 470 V, VGS = -5/18 V RG,off = 4.2 Ω, VGS = +18/-5 V, Tvj = 175 °C
(1) for 10h over lifetime
12 1600
10
1200
6 800
400
0 0
0 5 10 15 20 25 30 0 200 400 600 800 1000
0.116
0.114
0.1 0.112
0.110
0.108
0.01 0.106
0.104
0.102
0.001 0.100
0.001 0.01 0.1 1 10 4 6 8 10 12 14
Forward characteristic body diode (typical), MOSFET Forward characteristic body diode (typical), MOSFET
IF,S = f(VSD) IF,S = f(VSD)
Tvj = 25 °C VGS = -5 V
1240 1240
1085 1085
930 930
775 775
620 620
465 465
310 310
155 155
0 0
0 1 2 3 4 5 6 0 1 2 3 4 5 6
Switching losses body diode (typical), MOSFET Switching losses body diode (typical), MOSFET
Erec = f(ISD) Erec = f(RG)
Vr = 470 V, RG,on = 10.5 Ω Vr = 470 V, IF,S = 620 A
1.6 1.6
1.3 1.3
1.0 1.0
0.6 0.6
0.3 0.3
0.0 0.0
0 310 620 930 1240 10 14 18 22 26 30
3.50
3.00
2.50
2.00
1.50
-50 -25 0 25 50 75 100 125
6 Circuit diagram
P1 P2 P3 TS1+
D1 D3 D5
G1 G3 G5 TS1-
S1.1 S3.1 S5.1 TS2+
S1.2 S3.2 S5.2
U V W
D2 D4 D6
TS2-
G2 G4 G6 TS3+
S2.1 S4.1 S6.1
S2.2 S4.2 S6.2
N1 N2 N3 TS3-
Figure 1
7 Package outlines
n4,1 `0,1
B
57,95
36,97
39,97
90,55
31,47
54,7
46,2
4,37
84,3
59,7
7,37
78,8
87,3
92,3
51,7
0
+0
6 - 0,3 HS1 A2 HS3 A3 HS4 A4
A1
D2 D3
d 0,8 A B C D4
9,75 D1 H
5
0 0
2x 2,6
j 1,0 A B C 8
H
(8,5)
15,5
59°
95,
663
9
4x
4x 4 `0,3
j 1,0 A B C
2x
j 1,0 A B C
j n0,3 A B C
4x 8,5 `0,3
66,5
8x
74,1
79,4
82
82,8 Y Y
8x n4,5 `0,15
87 L
90,75
D8 D5
d 0,8 A B C D6
D7 S
6,35 HS8 HS7 HS5
A8 A7 A6 A5
0
46,2
26
1,13
21
49,271
68
78,8
H-H ( 2 : 1 )
6x (heatstaking dome)
L(4:1)
j 0,8 A B C
6x 4,9 `0,2 15,8
A A1 to A8
2x (HS4;HS8)
j 0,4 A B C
j n1,2 A B C
dimensioned for
EJOT Delta PT WN5451 30x10
(valid for PCB 1,6 ±0,16)
6x n3 `0,1
C
(4 ,
S(2:1)
5)
0, 1
(n2,5)
(22,44) `
4 `0,1 4,1
6x (15,7) Y-Y ( 2 : 1 )
j n1,2 A B C principle view
6x 0,1 `0,175
(2,385) rotation bar to
(5,32)
(D1;D3-D5;D7;D8 only).
(9,84)
(6,4)
(15,17) (7,27)
Figure 2
j 1,2 A B C B
0
3x 3x
j 1,0 A B C j 1,0 A B C
36,97
40,4
4,37
84,3
25,6
53,6
72,6
21,4
51,7
6x
6,6
0
j 1,0 A B C
N1-N3;P1-P3
6x 1,5 `0,1
22,25
A A1 to A8 A1
A2 A3 A4
N1 P1 N2 P2 N3 P3
0
2,6
95,
6 63
°
59
9
79,4
82
A8 U V W
A5
A7 A6
C
(4,1)
114,25
120,25
3x 1,5 `0,1
3x
3x j 1,0 A B C
j 1,0 A B C
0
20,6
49,271
67,6
26,4
U;V;W
0
7,6
3x
3x 14 `0,2 n6,2 `0,1 j n0,6 CZ A
j n1,2 A B C
Figure 3
n(4,1)
B
34,75
26,65
20,35
59,25
67,35
12,25
30,7
32,5
63,3
79,5
14,5
16,3
0
No pin higher than
heatstaking dome
0
A A1 to A8
D4
D2
D6
18,85
G4
S4.1
S4.2
S6.2
G6
S2.2
G2
S2.1
S6.1
95,
663
°
59
9
53,85 TS1+ TS2+ TS3+
S3.2
S1.2
S5.2
S3.1
S5.1
S1.1
G3
G5
G1
65,75
D5
D1
69,85
82
C
(4,1)
0
34,75
30,7
26,65
11,35
1,65
12,25
16,3
20,35
35,65
45,35
49,271
59,25
63,3
67,35
82,65
L ( 4:1 )
All pin positions checked
with pin gauge according
to Application Note
Figure 4
71549142846550549911530 71549142846550549911530
X950566091T2X0003E0S754389D1139Q15
Figure 5
Revision history
Document revision Date of release Description of changes
0.10 2022-04-06 Initial version
0.11 2023-01-19 Target datasheet
0.20 2023-06-20 Preliminary datasheet
1.00 2024-03-14 Final datasheet
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