The Microprocessor & Its Architecture: by Engr: Shah Rehan Ali
The Microprocessor & Its Architecture: by Engr: Shah Rehan Ali
The Microprocessor & Its Architecture: by Engr: Shah Rehan Ali
ARCHITECTURE
Data Reg: Holds the data such as a part of the data from the
multiplication or part of dividend before division.
But
Success with a positive attitude is called achievement
So be an achiever…..
The protected Mode Memory Addressing
From an application point of view, protected mode and real
mode are not that different. Both use memory segmentation,
Interrupts, and device driver to handle the hardware.
The MP 80286 and above can operate in real and protected
mode, that they can access the data and program not only in the
first 1 MB of memory but above the 1MB of memory.
The segment Address is not present in protected mode, instead
of segment address the register contains a selector the selects a
descriptor from a descriptor table.
The Descriptor describe the…
* Memory Segment Location
* Length
* Access rights .
The selector field chooses one the 8192 descriptor from the
descriptor table.
The T1 field decides whether the global Descriptor table (TI=0)
or the Local Descriptor (TI=1).
The request privilege level request the access privilege of a
memory segment. The highest privilege level is 00 and lowest
11.if the access right byte of the descriptor has set as 10 that is
request PL and RPL contain 11 then access granted b/c 10 is
higher in priority than 11.
Two types of Descriptor .
1- Global Descriptor : contain segment definition and that apply to All
Application . (SD).
2- Local Descriptor : are unique to an Application . (AD).
There are total 8192 (global) + 8192 (local) = 16,384 descriptor , which are
avilable to an application at any time.
The Descriptor format
The base address describe the starting location of the memory
segment . For 80286 MP the base address is of 24 bits so
segment begins at any location in 16M-bytes of memory.
The 80386 and above use 32 bit wide addresses so a segment
can start at any location in 4Gbytes of memory.
The segment limit contain the last offset address of a segment .
For example if a segment at F000ooH and ends at F000FFH, for
the 80286 the base address is F00000H and the limit is FFH.
If we see the 80386 and above the base is 00F00000H and the
limit is 000FFH.
The base address, limit and access right of the descriptor are
loaded from every time the corresponding selector changes.
The LDTR and TR refer to special system descriptor in GDT
These registers provide hardware acceleration support for task
register.
The LDTR selector indexes a GDT system describing the
segment containing the LDT while the cache stores the actual
LDT descriptor.
The LDTR selector can be loaded with a new value when
another task is in run.
Descriptor Tables
The descriptor tables define all of the segments which are used
in intel486 chip.