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ORCIDClaire Fenouillet-Béranger
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2020 – today
- 2024
[c24]J. Luge-Alvarez, J. B. David, Alexandre Siligaris, Vincent Puyal, G. Moritz, Tadeu Mota Frutuoso, V. Lapras, Claire Fenouillet-Béranger, Laurent Brunet, P. Vincent, Didier Lattard, Xavier Garros, François Andrieu, Perrine Batude:
First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications. VLSI Technology and Circuits 2024: 1-2- 2023
- [c23]Claire Fenouillet-Béranger, Alexandre Bordat, Mohamed Amine Khelif, Petr Dobiás, Ngoc-Son Vu, Julien Le Kernec, David Guyard, Olivier Romain:
Radar-Based Human Activity Acquisition, Classification and Recognition Towards Elderly Fall Prediction. DSD 2023: 95-102 - 2022
- [c22]Tadeu Mota Frutuoso, Xavier Garros, Perrine Batude, Laurent Brunet, Joris Lacord, Benoit Sklénard, V. Lapras, Claire Fenouillet-Béranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, Edoardo Catapano, Mikaël Cassé, Jose Lugo-Alvarez, Philippe Ferrari, Fred Gaillard:
Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. VLSI Technology and Circuits 2022: 332-333 - 2021
- [c21]Tadeu Mota Frutuoso
, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari:
Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration. IRPS 2021: 1-5
2010 – 2019
- 2018
- [c20]François Andrieu, Perrine Batude, Laurent Brunet, Claire Fenouillet-Béranger, Didier Lattard, Sébastien Thuries, Olivier Billoint, Richard Fournel, Maud Vinet:
A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit. ICICDT 2018: 141-144 - [c19]Denys R. B. Ly, Alessandro Grossi, Thilo Werner, Thomas Dalgaty, Claire Fenouillet-Béranger, Elisa Vianello, Etienne Nowak:
Role of synaptic variability in spike-based neuromorphic circuits with unsupervised learning. ISCAS 2018: 1-5 - 2017
- [c18]Jessy Micout, Quentin Rafhay, Xavier Garros, Mikaël Cassé, Jean Coignus, Luca Pasini, Cao-Minh Vincent Lu, Nils Rambal, Claire Fenouillet-Béranger, Laurent Brunet, G. Romano, R. Gassilloud, Perrine Batude, Maud Vinet, Gérard Ghibaudo:
Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devices. ESSDERC 2017: 144-147 - [c17]Claire Fenouillet-Béranger, S. Beaurepaire, Fabien Deprat, Alexandre Ayres De Sousa, Laurent Brunet, Perrine Batude, Olivier Rozeau, François Andrieu, Paul Besombes, M.-P. Samson, Bernard Previtali, F. Nemouchi, G. Rodriguez, Philippe Rodriguez, R. Famulok, Nils Rambal, Viorel Balan, Z. Saghi, V. Jousseaume, Charles-Antoine Guérin, F. Ibars, F. Proud, D. Nouguier, David Ney, V. Delaye, H. Dansas, X. Federspiel, Maud Vinet:
Guidelines for intermediate back end of line (BEOL) for 3D sequential integration. ESSDERC 2017: 252-255 - [c16]Melanie Brocard, Benoît Mathieu, Jean-Philippe Colonna, Cristiano Santos, Claire Fenouillet-Béranger, Cao-Minh Vincent Lu, Gerald Cibrario, Laurent Brunet, Perrine Batude, François Andrieu, Sébastien Thuries, Olivier Billoint:
Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells. ISVLSI 2017: 539-544 - 2016
- [c15]Séverine Cheramy, Amandine Jouve, Lucile Arnaud, Claire Fenouillet-Béranger, Perrine Batude, Maud Vinet:
Towards high density 3D interconnections. 3DIC 2016: 1-2 - [c14]Séverine Cheramy, Amadine Jouve, Lucile Arnaud, Claire Fenouillet-Béranger, Perrine Batude, Maud Vinet:
Towards high density 3D interconnections. 3DIC 2016: 1-5 - [c13]Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint:
Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. ESSDERC 2016: 218-221 - [c12]Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot:
Opportunities brought by sequential 3D CoolCube™ integration. ESSDERC 2016: 226-229 - [c11]Claire Fenouillet-Béranger, Perrine Batude, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, M.-P. Samson, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Gerald Cibrario, Maud Vinet:
Recent advances in 3D VLSI integration. ICICDT 2016: 1-4 - 2015
- [c10]Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Deprat, Alexandre Ayres De Sousa, Perrine Batude, Claire Fenouillet-Béranger, Fabien Clermidy:
Intermediate BEOL process influence on power and performance for 3DVLSI. 3DIC 2015: TS1.3.1-TS1.3.5 - [c9]Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, A. Fustier, Julien Michallet, Olivier Faynot, Ogun Turkyilmaz, Jean-Frédéric Christmann, Sébastien Thuries, Fabien Clermidy:
A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool. DATE 2015: 1192-1196 - [c8]M. Azzaz, A. Benoist, Elisa Vianello, Daniele Garbin, Eric Jalaguier, Carlo Cagli, C. Charpin, Stefania Bernasconi, Simon Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, Philippe Candelier, Claire Fenouillet-Béranger, Luca Perniola:
Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization. ESSDERC 2015: 266-269 - [c7]Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, Ogun Turkyilmaz, Sébastien Thuries, Fabien Clermidy:
From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges. ISPD 2015: 127 - 2014
- [c6]Claire Fenouillet-Béranger, Bernard Previtali, Perrine Batude, Fabrice Nemouchi, Mikaël Cassé, Xavier Garros, Lucie Tosti, Nils Rambal, Dominique Lafond, Hugo Dansas, Luca Pasini, Laurent Brunet, Fabien Deprat, Magali Grégoire, M. Mellier, Maud Vinet:
FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration. ESSDERC 2014: 110-113 - 2013
- [c5]Yohann Solaro, Pascal Fonteneau, Charles-Alexandre Legrand, Claire Fenouillet-Béranger, Philippe Ferrari, Sorin Cristoloveanu:
Novel back-biased UTBB lateral SCR for FDSOI ESD protections. ESSDERC 2013: 222-225 - 2012
- [c4]Carlos Navarro, Noel Rodriguez, Luca Donetti, Akiko Oliata, Francisco Gámiz, François Andrieu, Olivier Faynot, Claire Fenouillet-Béranger, Sorin Cristoloveanu:
Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET. ESSDERC 2012: 209-212 - [c3]Imed Ben Akkez, Antoine Cros, Claire Fenouillet-Béranger, Frédéric Boeuf, Quentin Rafhay, Francis Balestra, Gérard Ghibaudo:
New parameter extraction method based on split C-V for FDSOI MOSFETs. ESSDERC 2012: 217-220 - 2010
- [c2]Olivier Thomas, Jean-Philippe Noel, Claire Fenouillet-Béranger, Marie-Anne Jaud, J. Dura, P. Perreau, Frédéric Boeuf, François Andrieu, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Andrei Vladimirescu, Amara Amara:
32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit. ISCAS 2010: 1703-1706
2000 – 2009
- 2009
- [j1]Xavier Garros, Mikaël Cassé, M. Rafik, Claire Fenouillet-Béranger, Gilles Reimbold, François Martin, Claudia Wiemer, F. Boulanger:
Process dependence of BTI reliability in advanced HK MG stacks. Microelectron. Reliab. 49(9-11): 982-988 (2009) - [c1]Claire Fenouillet-Béranger, P. Perreau, S. Denorme, L. Tosti, François Andrieu, Olivier Weber, S. Barnola, C. Arvet, Y. Campidelli, Sébastien Haendler, R. Beneyton, C. Perrot, C. de Buttet, P. Gros, Loan Pham-Nguyen, F. Leverd, P. Gouraud, F. Abbate, F. Baron, A. Torres, C. Laviron, L. Pinzelli, J. Vetier, C. Borowiak, A. Margain, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Olivier Faynot, Thomas Skotnicki:
Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below. ESSCIRC 2009: 88-91
Coauthor Index
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