Bfm2313-Digital Electronics 11213
Bfm2313-Digital Electronics 11213
Bfm2313-Digital Electronics 11213
Universiti
J Malaysia
PAHANG
DIGITAL ELECTRONICS
COURSE CODE
BFM2313
LECTURER
DATE
16 JANUARY 2013
DURATION
3 HOURS
SESSION/SEMESTER :
PROGRAMME CODE :
BFM
INSTRUCTIONS TO CANDIDATE:
This examination paper consists of FOUR (4) printed pages including front page.
CONFIDENTIAL
BFM/121311BFM2313
Assume that each logic gate can have any number of inputs and that inverted inputs are
available.
[6 marks]
(d) If the time delay experienced by a NAND gate is 1 Ons and the time delay experienced in a
NOR gate is 8ns. Which implementation of (c) is faster? By how long?
[3 marks]
(e) Prove the rule of Boolean algebra: (A + B)(A + C) A + BC
[4 marks]
CONFIDENTIAL
BFMJ1213I/BFM2313
CONFIDENTIAL
BFM/121311BFM2313
R
Figure 1: S-R Latch
[5 marks]
(b) From the basic S-R circuit in part (a) above, show how a J-K flip-flop can be formed to
overcome the limitations by modifying the basic S-R circuit to convert into a JK flip-flop
with asynchronous set and reset inputs. Describe your answer with circuit diagrams, truth
table and timing diagrams where necessary.
[10 marks]
(c) How can a JK flip-flop be used as a 1-bit memory storage device? Use this configuration
to build a 4-bit parallel data storage device.
[10 marks]