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    Vlsi Technology Kec 053

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    Anonymous eWMnRr70q
    This document contains the questions and sections for a B.Tech VLSI Technology exam. It has 7 sections with a total of 100 marks. Section A contains 10 short answer questions worth 2 marks each for a total of 20 marks. Section B contains 5 long answer questions worth 10 marks each for a total of 30 marks. Section C contains 6 long answer questions, with students required to answer 1 out of 2 questions in each part. Sections D and E continue this pattern with additional long answer questions worth 10 marks each. The exam covers topics related to VLSI technology including silicon crystal structure, defects, annealing, epitaxy, oxidation, photoresist, metallization, packaging, and fabrication processes.

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    Vlsi Technology Kec 053

    Uploaded by

    Anonymous eWMnRr70q
    177 views1 page
    This document contains the questions and sections for a B.Tech VLSI Technology exam. It has 7 sections with a total of 100 marks. Section A contains 10 short answer questions worth 2 marks each for a total of 20 marks. Section B contains 5 long answer questions worth 10 marks each for a total of 30 marks. Section C contains 6 long answer questions, with students required to answer 1 out of 2 questions in each part. Sections D and E continue this pattern with additional long answer questions worth 10 marks each. The exam covers topics related to VLSI technology including silicon crystal structure, defects, annealing, epitaxy, oxidation, photoresist, metallization, packaging, and fabrication processes.

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    aktu

    Original Title

    VLSI-TECHNOLOGY-KEC-053

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    This document contains the questions and sections for a B.Tech VLSI Technology exam. It has 7 sections with a total of 100 marks. Section A contains 10 short answer questions worth 2 marks each for a total of 20 marks. Section B contains 5 long answer questions worth 10 marks each for a total of 30 marks. Section C contains 6 long answer questions, with students required to answer 1 out of 2 questions in each part. Sections D and E continue this pattern with additional long answer questions worth 10 marks each. The exam covers topics related to VLSI technology including silicon crystal structure, defects, annealing, epitaxy, oxidation, photoresist, metallization, packaging, and fabrication processes.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    177 views1 page

    Vlsi Technology Kec 053

    Uploaded by

    Anonymous eWMnRr70q
    This document contains the questions and sections for a B.Tech VLSI Technology exam. It has 7 sections with a total of 100 marks. Section A contains 10 short answer questions worth 2 marks each for a total of 20 marks. Section B contains 5 long answer questions worth 10 marks each for a total of 30 marks. Section C contains 6 long answer questions, with students required to answer 1 out of 2 questions in each part. Sections D and E continue this pattern with additional long answer questions worth 10 marks each. The exam covers topics related to VLSI technology including silicon crystal structure, defects, annealing, epitaxy, oxidation, photoresist, metallization, packaging, and fabrication processes.

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    of 1

    Printed Page: 1 of 1 

    Subject Code: KEC053


    0Roll No: 0 0 0 0 0 0 0 0 0 0 0 0 0

     
    B TECH
    (SEM-V) THEORY EXAMINATION 2020-21
    VLSI TECHNOLOGY
    Time: 3 Hours Total Marks: 100
    Note: 1. Attempt all Sections. If require any missing data; then choose suitably.
    SECTION A
    1. Attempt all questions in brief. 2 x 10 = 20
    Qno. Question Marks CO
    a. Explain the terms: SSI, LSI, MSI and VLSI. 2 1
    b. Define the crystal structure of Silicon. 2 1
    c. What are point defects? 2 1
    d. What is meant by annealing? 2 2
    e. Mention cardinal rules for hetero epitaxy. 2 2
    f. State the purpose of oxidation. 2 3
    g. Differentiate between positive and negative photoresist. 2 4
    h. Why is aluminum preferred for metallization? 2 5
    i. Mention various packaging types available for IC fabrication. 2 5
    j. What do you mean by SOI? 2 3
    SECTION B

    P
    2. Attempt any three of the following: 0Q 3 x 10 = 30
    Qno. Question Marks CO

    1
    13
    a. Describe CZ process in detail with neat diagram. Mention the importance of inert ambient 10 1
    29

    during the process.

    2.
    0E

    b. Explain the different types of deposition reactors used for VPE. 10 2

    24
    c. Explain the process of e-beam lithography with the help of suitable diagram. Mention its 10 3
    P2

    5.
    advantages over optical lithography.
    _Q

    d. State and derive diffusion equation in case of limited source. Also explain the diffusion 10 4
    profile with the help of suitable graph.
    .5
    17
    TU

    e. What are the different package types used for VLSI devices? What are different packaging 10 5
    |1

    design considerations?
    AK

    SECTION C
    7

    3. Attempt any one part of the following:


    :5

    a. Explain production process of Electronic Grade Silicon from silica with neat diagram. 10 1
    13

    b. Discuss different operations involved in preparation of wafers using schematic diagram. 10 1


    :

    4. Attempt any one part of the following:


    09

    a. Explain molecular beam epitaxy. What are the advantages offered by it over vapor phase 10 2
    epitaxy?
    1

    b. Explain the chemistry and kinetics of growth using Deal& Grove’s Model. 10 2
    02

    5. Attempt any one part of the following:


    -2

    a. What is wet chemical etching? Explain how etching reaction take place by using HNA. 10 3
    ar

    Mention the purpose of each acid in it.


    M

    b. Describe the process of optical lithography. Classify optical lithography based on placement 10 3
    of wafer and mask.
    3-

    6. Attempt any one part of the following:


    |0

    a. Explain the mechanism of diffusion. State and derive Fick’s first law of diffusion. Also, 10 4
    derive Fick’s second law from the first law.
    b. What is Ion-implantation? Why is ion-implantation preferred over diffusion for impurity 10 4
    doping? Explain briefly ion-implantation technique with a labeled sketch.
    7. Attempt any one part of the following:
    a. Elaborate the various steps of CMOS fabrication with diagram and explanation. 10 5
    b. Explain vacuum evaporation technique of metallization. 10 5

    1 | P a g e  
     
    AKTU_QP20E290QP | 03-Mar-2021 09:13:57 | 117.55.242.131

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