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    Applications of Combinational Circuits - Edited 2020

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    Matthew Lewis
    1. Adders are arithmetic circuits that combine two operands. There are two types: half adders and full adders. Half adders add two 1-bit operands and produce a 2-bit sum and carry output. Full adders facilitate addition of three input bits. 2. Decoders are combinational circuits that convert binary inputs to outputs. A 3-to-8 line decoder maps 3 input bits to 8 unique output lines. Decoders with enable lines can disable the outputs. Encoders perform the inverse of decoders. 3. Multiplexers are circuits with multiple inputs and one output. The selection lines determine which input is passed

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    Applications of Combinational Circuits - Edited 2020

    Uploaded by

    Matthew Lewis
    25 views26 pages
    1. Adders are arithmetic circuits that combine two operands. There are two types: half adders and full adders. Half adders add two 1-bit operands and produce a 2-bit sum and carry output. Full adders facilitate addition of three input bits. 2. Decoders are combinational circuits that convert binary inputs to outputs. A 3-to-8 line decoder maps 3 input bits to 8 unique output lines. Decoders with enable lines can disable the outputs. Encoders perform the inverse of decoders. 3. Multiplexers are circuits with multiple inputs and one output. The selection lines determine which input is passed

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    Applications of Combinational Circuits - edited 2020

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    1. Adders are arithmetic circuits that combine two operands. There are two types: half adders and full adders. Half adders add two 1-bit operands and produce a 2-bit sum and carry output. Full adders facilitate addition of three input bits. 2. Decoders are combinational circuits that convert binary inputs to outputs. A 3-to-8 line decoder maps 3 input bits to 8 unique output lines. Decoders with enable lines can disable the outputs. Encoders perform the inverse of decoders. 3. Multiplexers are circuits with multiple inputs and one output. The selection lines determine which input is passed

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    25 views26 pages

    Applications of Combinational Circuits - Edited 2020

    Uploaded by

    Matthew Lewis
    1. Adders are arithmetic circuits that combine two operands. There are two types: half adders and full adders. Half adders add two 1-bit operands and produce a 2-bit sum and carry output. Full adders facilitate addition of three input bits. 2. Decoders are combinational circuits that convert binary inputs to outputs. A 3-to-8 line decoder maps 3 input bits to 8 unique output lines. Decoders with enable lines can disable the outputs. Encoders perform the inverse of decoders. 3. Multiplexers are circuits with multiple inputs and one output. The selection lines determine which input is passed

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    You are on page 1of 26

    Arithmetic Circuits

    Prepared By: Kedrian James

    Edited by: Karlene M. Black – Nov 2020


    Adders
    Addition is the most commonly performed operation.

    Circuits which combines two arithmetic operands.

    Used for both signed and unsigned 2’s complement


    numbers.

    Two types of Adders:


    Half Adder
    Full Adder
    Half Adder
    Simple adder

    Adds two 1-bit operands to produce a 2-bit sum.


    sum ranges from 0 – 2 which requires two bits to express

    Example :
    0+0 = 0 0+1 = 1
    1+0 = 1 1+1 = 10 – the 1 represents a carry.

    In the above addition of 1+1 the higher significant bit is called a
    carry and the lower significant bit the sum.
    Half Adder
    Boolean expression for half adder:

    ՛ ՛
    Sum = X Y + XY => X Y
    Carry = XY

    x y Carry Sum
    0 0 0 0 X
    Y
    0 1 0 1
    1 0 0 1
    1 1 1 0
    Full Adder
    Facilitates addition in which there are three input bits

    Maybe constructed from two half adders

    Outputs range from 0 to 3

    Consist of three inputs and two outputs


    Two of the inputs represents two bits to be added and the
    third is the carry from the previous lower significant
    position.
    x y cin Sum cout
    Full Adder
    0 0 0 0 0
    0 0 1 1 0
    0 1 0 1 0
    0 1 1 0 1
    1 0 0 1 0
    1 0 1 0 1
    1 1 0 0 1 Logic diagram for full adder (FA)
    1 1 1 1 1 X

    FA
    Sum
    Block diagram for full adder (FA) Y

    C in C out

    Sum = A B C
    Carry = AB + AC + BC Block diagram for full adder (FA)
    Exercise
    1. Use two half adders to construct a full adder

    2. Construct a half subtractor

    3. Give the truth table for the half subtractor


    Decoders
     Combinational circuits that convert binary information from n inputs to a
    maximum of 2n unique output lines
     Inputs (n)
     Outputs (2n , numbered from 0  2n - 1)

     Naming convention is based on the number of input and output lines.


    Normally n to m decoder where M<=2n

     May contain one or more enable lines which are used to control the
    operation of the circuits

     If they have enable lines they are called demultiplexers, and used to form
    larger decoder circuits.
    Decoders
     3-to-8 line decoder (without enable)
     Truth table

    X Y Z D0 D1 D2 D3 D4 D5 D6 D7
    0 0 0 1 0 0 0 0 0 0 0
    0 0 1 0 1 0 0 0 0 0 0
    0 1 0 0 0 1 0 0 0 0 0
    0 1 1 0 0 0 1 0 0 0 0
    1 0 0 0 0 0 0 1 0 0 0
    1 0 1 0 0 0 0 0 1 0 0
    1 1 0 0 0 0 0 0 0 1 0
    1 1 1 0 0 0 0 0 0 0 1
    Decoders
     3-to-8 line decoder (without enable)
     Circuit

    Z
    Exercise
    1. Construct a 2 to 4 line decoder
    Decoder with Enable Line
    Some decoders may have an enable line

    If enable=0 , decoder is disabled/off. It means all output


    lines are zero

    If enable=1, decoder is enabled/on.


     depending on input, the corresponding output line is 1, all
    other lines are 0.
    Decoder with Enable Line
    Application of Decoder
    A decoder may be used to implement a combinational
    circuit function.
    A. S(x,y,z) = ∑ ( 1,2,4,7)
    B. C(x,y,z) = ∑ (3,5,6,7)
    Encoder
    Combinational circuit that convert binary information from m
    inputs to n output lines

    performs the inverse operation of a decoder

    Generally encoders produce2-bit, 3-bit or 4-bit code. n bit


    encoder has 2n input lines

    2 bit encoder
    Multiplexer
    Combinational circuit that selects binary data from one input line and
    directs it to the output line.

    Has multiple input lines and one output line.

    Usually there are 2n input lines, where n represents the number of selection
    lines.

    The bit combination of the selection lines determine which input line is selected

    Eg. with a 2-to-1 line multiplexer, if selection S is zero then I0 has the path to
    output and if S is one I1 has the path to output (see diagram on the next slide).
    2-to-1 Line Multiplexer
    4-to-1 Line Multiplexer
    Implementation of a Multiplexer
    Multiplexer can be used to implement Boolean functions.

    Procedure for implementing any Boolean function of n


    variables with a 2n-1 – to – 1 multiplexer:

    1. Express the function in its sum of minterm form:


    F(A,B,C) = ∑(1, 3, 5, 6)
    2. Assume that the ordered sequence of variables chosen for
    the minterm is ABC….., where A is the leftmost variable
    in the sequence , BC… are the remaining variables.
    Implementation of a Multiplexer
    3. Use the remaining variables BC… as selection lines to the
    multiplexer, B being the highest order selection line, C
    being the second highest and so on. (Counting from
    highest to lowest).
    B selection line 1
    C selection line 0
    Implementation of a Multiplexer
    4. Work with the variable A:
     it will be complemented in minterms 0 to (2n/2) -1; this
    comprises the first half of the list of minterms. From
    the above (23/2)-1 = 3, therefore A’ = 0 to 3.
     Un-complement the second half resulting in A = 4 to 7.
    5. Define the inputs of the multiplexer (2 selection lines ).
     In this example, there will be four inputs 22 = 4,
    inputs=I0, I1, I2, I3
    Implementation of a Multiplexer
    6. Construct an implementation table. The table will have
    columns equaling the number of inputs to the multiplexer

      I0 I1 I2 I3
    A’ 0 1 2 3
    A 4 5 6 7
    value        
    Implementation of a Multiplexer
    7. Circle the minterms of the function corresponding to the
    given expression.
    F(A,B,C) = ∑(1, 3, 5, 6)

      I0 I1 I2 I3
    A’ 0 1 2 3
    A 4 5 6 7
    value        
    Implementation of a Multiplexer
    8. Apply rules to get values:
     None circled => value = 0
     Both top and bottom circled => value = 1

     Top only circled => complemented literal


     Bottom only circled => un-complemented literal

      I0 I1 I2 I3
    A’ 0 1 2 3
    A 4 5 6 7
    value 0 1 A A’
    Implementation of a Multiplexer
      I0 I1 I2 I3
    8. Draw and label the
    A’ 0 1 2 3
    circuit:
    A 4 5 6 7
    value 0 1 A A’
    I0

    1 I1
    4 x 1 MUX
    F
    A I2

    I3

    BC
    Select Lines
    Exercise
     Implement each of the following using both a
    decoder and a multiplexer.

    1. F(ABC) = ∑(1,2,4,5)
    2. F(XYZ) = ∑(1,2,6,7)
    3. F(ABCD) = ∑(0,1,3,4,8,9,15)

     Implement the full adder using a decoder

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