DIGITAL CIRCUITS

COMBINATIONAL
CIRCUITS
 DIGITAL CIRCUITS
 Digital circuits are constructed with integrated circuits.
 Basically, digital circuits are of one of the following types;
 Combinational circuits
 Sequential circuits

 A combinational logic circuit is one where the output or

outputs depend upon the present state of combination of the
logic inputs.
 A sequential circuit is a logic circuit whose output depends
on the present time inputs, the previous output and the
sequence in which the inputs are applied. It therefore
requires a memory.
Introduction to Combinational Circuits

 Combinational circuit is a logic circuit whose

outputs depend only on the current inputs.
 Any changes to the signals being applied to their
inputs will immediately have an effect at the
output.
 In other words, in a combinational logic circuit, the
output is dependant on the combination of its
inputs and if one of its inputs condition changes
state, so does the output.
Combinational Logic circuits
 The logic gate is the most basic building block of
combinational logic.
 The logical function performed by a combinational
 circuit is fully defined by a set of Boolean
expressions.
 Between the inputs and outputs, logic gates are
connected.
Combinational Logic circuits
 Figure below shows the block schematic
representation of a generalized combinational
circuit having n input variables and m output
variables or simply outputs.
 Combinational Logic circuits

 The function of combinational logic circuit can be specified

in three ways;
 Truth table – provides a concise list that shows the output value
for each possible combination of input variables in tabular form.
 Boolean Algebra – Forms an output expression for each input
variable that represents a logic “1”.
 Logic Circuit Diagram – Shows the wiring and connections of
each individual logic gate that implements the circuit.
 As combinational logic circuits are made up from the
individual logic gates only ,they can also be considered as
decision making circuits.
Combinational Logic circuits
 A combinational circuit consists of input
variables, logic gates and output variables.
 The logic gates accept signals from the inputs

and generate signals to the outputs.

 The process transforms binary information

from the input data to the required output data.

 Both input and output data are represented by

binary signals.
Combinational Logic circuits
 Digital computers perform a variety of information
processing tasks. Among these basic functions
encountered are various arithmetic operations.
CLASSIFICATION OF COMBINATIONAL
LOGIC CIRCUITS

 Common combinational circuits made up from

individual logic gates that carry out a desired
application include;
 Adders
 Subtractors
 Comparators
 Multiplexers
 Demultiplexers
 Decoders
 Encoders
 Adders
 Half-adder
 A logic circuit used for adding two 1-bit numbers or
simply two bits.
 It has 2 outputs which are sum and carry.
 Made up from the standard AND and Ex – OR gates and
allows us to add together single bit binary numbers, a
and b to produce two outputs, the SUM of the addition
and a CARRY called the Carry-out bit.
 One major disadvantage of the half adder circuit is that
there is no provision for a “Carry-in” from the previous
circuit when adding multiple data bits, hence can not be
used to build larger units.
Half-adder

SUM S = AB+AB
CARRY C = AB
Half-adder

 The ‘Sum’ values in the above truth table

resembles an Ex-OR Gate. Similarly, the values for
‘Carry’ in the above truth table resembles an AND
Gate.
Adders (cont.)
COMBINATIONAL LOGIC
 Full-adder
 A full adder circuit is an arithmetic circuit block that
can be used to add three bits to produce a SUM and
a CARRY output.
 Such a building block becomes a necessity when it
comes to adding binary numbers with a large
number of bits.
 The full adder circuit overcomes the limitation of the
half-adder, which can be used to add two bits only.
 Combinational Logic circuits
 It is so called because it adds together two
significant binary digits, plus a carry-in digit to
produce a sum and carry-out digit.
 Two outputs are necessary because the
arithmetic sum of 3 binary digits ranges in
value from 0 – 3, and binary 2 or 3 requires 2
digits.
Class work: Derive the Boolean expressions for the
two outputs of a full adder.

 Allows building N-bit adders

 Simple technique
 Connect Cout of one adder to Cin of the next
 These are called ripple-carry adders
 Adders
 Ripple Carry Adder
 The ripple carry, or parallel adder, arises out of
considering how we perform addition.
 Two numbers can be added by beginning with the two
least significant digits to produce their sum, plus a carry-
out bit (if necessary).
 Then the next two digits are added (together with any
carry-in bit from the addition of the first two digits) to
produce the next sum digit and any carry-out bit produced
at this stage.
 This process is then repeated until the most significant
digits are reached
Consequently by joining four full adders together, with the
carry-out from one adder connected to the carry-in of the
next, a four-bit adder can be produced.
 The name ripple carry adder arises because of the way

the carry signal is passed along, or ripples, from one full

adder to the next.
 One main disadvantage of “cascading” together 1-bit

binary adders to add large binary numbers is that if

inputs (A and B) change, the sum at the output will not
be valid until any carry-input has rippled through every
full adder in the chain.
Adders
 Consequently, there will be a finite delay before the output of a
adder responds to a change in its inputs resulting in the
accumulated delay especially in large multi-bit binary adders
becoming prohibitively large.
 This delay is called Propagation delay.
 One solution is to generate the carry-input signals directly
from the A and B inputs rather than using the ripple
arrangement.
 This the produces another type of binary adder circuit called a
Carry Look Ahead Binary Adder where the speed of the
parallel adder can be greatly improved using the carry-look
ahead logic.
Adders (cont.)
A 16-bit ripple-carry adder
Adders (cont.)
 Ripple-carry adders can be slow
 Delay proportional to number of bits
 Carry look-head adders
 Eliminate the delay of ripple-carry adders by
using extra circuitry to predict this rippling in
advance.
 This gives a speed advantage at the expense of a
more complex circuit.
 Usually, a combination carry look-ahead and
ripple-carry techniques are used
Combinational circuits: Subtractors
 In digital arithmetic, we saw how subtraction of two
given binary numbers can be carried out by adding 2’s
complement of the subtrahend to the minuend. This
allows us to do a subtraction operation with adder
circuits.
 A half-subtractor is a combinational circuit that can be
used to subtract one binary digit from another to produce
a DIFFERENCE output and a BORROW output.
 The BORROW output here specifies whether a ‘1’ has
been borrowed to perform the subtraction.
Multiplexers

 Multiplexer devices are used when a user wishes to select one

of many inputs and connect to a single
 output.
 A multiplexer will in general have n inputs, and an output, with
m control lines which are used to select one of the n inputs.
 Which of the n-input channels is routed through to the output is
determined by the bit pattern on the m control lines.
 Hence, n, the number of input lines that can be multiplexed is
2m
 A typical application of multiplexers is to convert parallel data (input) into serial
data (output) or to connect many users to a single line.
Multiplexers
Multiplexers
2-to-I multiplexer  This is the circuit diagram of a 2-to-1
multiplexer. Note that it has two inputs
(n= 2), with a single control line (m=
1).
 If A =0, then the output from the AND
gate with D1 as an input must be 0
whilst the output from the other AND
gate will be
A.DO= 1.DO= D 0.
 So, the output from the multiplexer is
Y= DO+ 0 = DO
 By similar reasoning if A = 1 then Y=
D,.
 In Boolean algebraic terms:
 Y= A.Do+A.D1
Multiplexers
 One way of thinking of the action of a multiplexer is
that only one of the AND gates is ever activated and
so allows the input signal fed to it through to the OR
gate.
 Thus the job of a multiplexer is to allow multiple
signals to share a single common output.
 Multiplexers are used as one method of reducing the
number of logic gates required in a circuit or when a
single data line is required to carry two or more
different digital signals.
 Multiplexers
 A 4-to-1 Multiplexer
4-data input MUX
 Selection input
determines the input
that should be
connected to the
output

.
Multiplexers (cont.)
4-data input MUX implementation
Multiplexers

Write the Boolean equation describing the output for

the 4 to1 multiplexer.
Demultiplexers
 Demultiplexer devices are used when a user wishes
to select one of many outputs from a single input.
 The selection process is controlled by the
setting/resetting of Data Select Lines.
 A typical application of demultiplexers is to
convert serial data (input) into parallel data (output)
or to connect a single line to many users.
 The relationship between the n output lines and
select lines is n=2m
Demultiplexers
 This circuit element is usually referred to as a 1-of-
n demultiplexer.
 The circuit basically consists of n AND gates, one
for each of the 2'" possible combinations of the m
control inputs, with the single line input fed to all
of these gates.
 Since only one AND gate will ever be active this
determines which output the input is fed to.
Classification of Demultiplexers
 These can be classified as follows;
 1:2 DeMUX
 1:4 DeMUX
 1:8 DeMUX
 1:16 DeMux
Demultiplexers
Demultiplexer (DeMUX)
Decoders
 The combinational circuit that change the binary
information into 2N output lines is known as Decoders.
 The binary information is passed in the form of N input
lines.
 The output lines define the 2N-bit code for the binary
information. In simple words, the Decoder performs the
reverse operation of the Encoder.
 At a time, only one input line is activated for simplicity.
The produced 2N-bit output code is equivalent to the
binary information.
2 to 4 line decoder:
 In the 2 to 4 line decoder, there is a total of three

inputs, i.e., A0, and A1 and E and four outputs, i.e.,

Y0, Y1, Y2, and Y3.
 For each combination of inputs, when the enable 'E'

is set to 1, one of these four outputs will be 1.

 The block diagram and the truth table of the 2 to 4

line decoder are given below.

 2 to 4 line decoder:  Truth Table:
 The logical expression
of the term Y0, Y0,
Y2, and Y3 is as
follows:
 Y3=E.A1.A0
Y2=E.A1.A0
Y1=E.A1.A0
Y0=E.A1.A0
 Decoders
 A decoder is a combinational circuit which converts n-bit binary
information at its input into a maximum of 2n output lines. For
n=2, a 2:4 decoder can be designed.
Comparator
 A digital comparator is a combinational circuit designed
to compare the n-bit binary words applied at its input.
 Digital comparators are made up from standard AND,
NOR and NOT gates that compare the digital signals
present at their input terminals and produce an output
depending upon the condition of those inputs.
 The comparator has 3 outputs namely:
 A>B
 A=B
 A<B
Comparator
 Depending on the results of comparison, one of
these outputs will go high.
 This is useful if we want to compare two variables
and want to produce an output when any of the
above three conditions are achieved. For an
example, produce an output from a counter when a
certain count number is reached.
 Comparator
 Used to implement comparison operators (= , > , < , )
1-bit Comparator
x>y
CMP x=y
x<y
x y

X Y X> x=y x<y

y
0 0 1 0
0 1 0 0 1
0
1 0 0 0
1 1 1 1 0
0