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Chapter 12 Differential Amplifiers

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Differential Amplifiers

1 Introduction
Differential amplifier is used at input stage of an operational amplifier (op-amp) to provide high gain to
differential mode signal and cancel common mode signal. It helps in achieving large value of common
mode rejection ratio (CMRR). Emitter and source coupled differential amplifiers are most commonly
used input stage of an op-amp. A differential amplifier has four different configurations depending upon
number of input signals used and the way output is taken. These configurations are
i) Dual Input Balanced Out or Differential Input Differential Output
ii) Dual Input Unbalanced Out or Differential Input Single Ended output
iii) Single Input Balance Output or Single Input, Differential Output
iv) Single Input Unbalanced Output or Single Input Single Ended Output
A differential amplifier can be operated in two modes of operations called differential mode and
common mode depending upon the inputs applied to the amplifier.

2 BJT Based Differential Amplifier


Fig. 1 shows the circuit diagrams of BJT based differential amplifiers with vin1 and vin2 as inputs and vo1
and vo2 as outputs of the amplifier. It is assumed that both transistors Q1 and Q2 are matched and biased
at constant current level I.
+VCC

v01 v02
+ v0 –
Q1 Q2
+ + + +
V
vin1

~ VBE1

– BE2 ~ –
vin2

RE

– VEE

Fig.1 Differential amplifier using BJTs

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2.1 DC Analysis
Case-I: Common mode operation
For common mode operation the both inputs of the differential amplifier are same. Fig. 2 shows the
circuit diagram of differential amplifier connected in common mode operation.
∴ vin1 = vin2 = vC (1)

The input voltage(vC) in common mode is selected such that both transistors are ON. If both transistors
are identical, then,
IQ
iE1 = iE2 = (2)
2

The collector current of transistors,


IQ
iC1 = iC2 = α · (3)
2

The voltage at collector terminals of transistors,


IQ
v01 = v02 = VCC – α RC
2

IQ
v01 ≈ VCC – RC [ α = 1] (4)
2
∴ Differential output, vo = v01 – v02 = 0 (5)

+VCC

iC1 RC iC2 RC
+ v0 –
vC v01 v02
Q1(ON) (ON)Q2

iE1 iE2

RE IQ

– VEE
Fig. 2 Differential amplifier with common mode input

Case-II : Differential mode operation with vin1 = + v, vin2 = 0 V


When vin1 = + v and vin2 = 0V, the transistor Q1 is ON and transistor Q2 is OFF.

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+VCC

iC1 RC RC iC2
+ v0 –
v01 v02
vin= 0V
Q1 (ON) (OFF)Q2
vin1=+v

iE1 iE2= 0
RE IQ

– VEE
Fig. 3 Differential amplifier with differential mode input

when Q1 is ON and Q2 is OFF,


iE1 = IQ, iE2 = 0 A (6)
∴ iC1 = α iE = αIQ ≈ IQ (7)
Voltage at collector of Q1,
v01 = VCC – iC1RC (8)
⇒ v01 = VCC – αIQRC ≈ VCC – IQ RC
[ α = 1] (9)
Voltage at collector of Q1,
v02 = VCC – IC2 RC (10)
Collector current of Q2, iC2 ≈ iE2 = 0
⇒ v02 = VCC (11)
Differential output, v0 = v01 – v02 = VCC – IQ RC – VCC (12)
⇒ vo = – IQRC (13)
2.2 Transfer Characteristics
When transistors Q1 and Q2 are forward biased the collector current of each transistor is given by,
iC1 = IS eVBE1 /VT (14)
iC2 = IS eVBE 2 /VT (15)
where IS is reverse saturation current and VT is thermal voltage.
i C1
= e(VBE1 –VBE 2 )/VT (16)
i C2

By applying KVL in loop containing two emitter junctions of Fig. 1, we have,


v1n1 – VBE1 + VBE2 – vin2 = 0
VBE1–VBE2 = v1n1 – vin2 = vd (17)

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The difference of two input voltages vd is called differential input voltage of amplifier.
i C1
⇒ = e vd /VT (18)
i C2

Also IQ = iE1 + iE2 (19)


i C1 i C2
⇒ IQ = + (20)
α α

i C1  i C2 
⇒ IQ = 1 +  (21)
α  i C1 

αI Q
⇒ iC1 = (22)
1 + e – vd /VT

αI Q
Similarly, iC2 = (23)
1 + e vd /VT

The transfer characteristics of differential amplifier can be drawn using equations (22) and (23) as
shown in Fig. 4.

iC linear regian
IQ
1.0
iC2 iC1
IQ IQ

–4 –2 –1 0 1 2 4
vd / VT
Fig. 4 Transfer characteristics of differential amplifier

Observations from transfer characteristics :


i. For vd > 4VT , iC1 = αIQ, iC2 = 0 (24)
v01 = VCC – αIQRC (25)
v02 = VCC (26)
ii. For vd < -4 VT , iC2 = αIQ, iC1 = 0 (27)
v01 = VCC (28)
iii. For –4VT < vd < + 4VT , the differential amplifier can be operated as a switch.

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iv. For –2VT < vd < 2VT., the differential amplifier functions as linear amplifier
v. Differential amplifier functions very good limiter for vd > ± 4VT
vi. Differential amplifier can be operated as Automatic Gain Controller (AGC) by varying IQ.

2.3 Differential Mode Gain
Differential mode gain of differential amplifier is obtained by performing small signal analysis of the
amplifier. Small signal analysis is performed by replacing the biasing voltage sources by ground and
BJTs by their small signal models.
For differential mode operation of differential amplifier, the input of transistor Q1, vin1, is increased
by an incremental value of +vd/2 and input of transistor Q2 , vin2 is decreased by a value vd/2. If only
incremental values are considered then,
vd v
vin1 = + and vin2 = – d (29)
2 2

Where, vd = vin1 – vin2 (30)


It is further assumed that the biasing current through transistor RE remains constant for above
incremental changes in input voltages of Q1 and Q2. The voltage at emitter terminals of transistors
remains constant for constant value of emitter current. Thus, the incremental change in voltage at
emitter terminal is zero. Therefore, the incremental voltage at emitter terminal is zero and emitter
terminal is considered at zero or ground potential (i..e VE =0 ) for above combination of input
voltages. The equivalent circuit of differential amplifier, for small signals, operating in differential
mode operation becomes as shown in Fig. 5.
Note : The terminal ‘E’ is taken at zero potential for differential mode because potential at E remains
constant for small variation in iC1 & iC2 because IQ remains constant. So for a.c. analysis, terminal
‘E’ is taken at zero potential.

RC RC
v01 v02

Q1 Q2 vd
v vin2= –
vin1= d 2
2
VE = 0

Fig. 5 Differential amplifier operating in differential mode

If both transistors are identical then output voltage can be obtained by taking only one half with

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single BJT as shown below,
+VCC +VCC

RC RC
C C
B v01 v02 B
Q1 Q2
v
+ d + + – vd
– E E – 

Fig. 6 Differential amplifier split into two equal halves


Case-I : Using rp Model :
Replacing BJT Q1by its π-model, the ac equivalent circuit of half part with positive input voltage
becomes as shown in Fig. 7.
B iC
+
+
vD +
vBE r gmvBE RC
 –
– E

Fig. 7 Small signal equivalent circuit of half part of differential amplifier using p-model
v
From base circuit, vBE = d (31)
2

Output voltage, v01 = – RCgmvBE (32)


vd
⇒ v01 = – RCgm · (33)
2

v01 R Cgm
⇒ = – (34)
vd 2

 Similarly, we can obtain the gain for second half to the differential amplifier with negative input
voltage as under,
v02 R Cgm
= (35)
vd 2

A. Differential mode gain for differential input balanced output

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v01 - v02 v v
ADM = = 01 - 02 (36)
vd vd vd

From equations (34), (35) and (36), we have,


gmR C gmR C
⇒ ADM = – - (37)
2 2

⇒ ADM = –gmRC (38)

B. Differential mode gain for differential input single ended outputs,


v01 g R
ADM = = - m C (39)
vD 2

v02 g m R C
or ADM = = (40)
vD 2

Case-II : Using approximate h-parameters


Replacing Q1by its approximate h-parameter model, the ac equivalent circuit of half part with
positive input voltage becomes as shown in Fig. 8.

ib B iC

+ +
vD + hie
vBE RC v01
 – hfeib
– E –


Fig. 8 Small signal equivalent circuit of half part of differential amplifier using
approximate h-parameter model

vd
From base circuit, vBE = (41)
2

vd
Output voltage, v01 = – RC hfe ib = – RC hfe (42)
2

v01 R h
⇒ = – C fe (43)
vd 2h ie

 Similarly, we can obtain the gain for second half to the differential amplifier with negative
input voltage as under,

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v02 h fe R C
= + (44)
vd 2h ie

A. Differential mode gain for differential input and balance output


v01 - v02
ADM = (45)
vd

v01 v02
⇒ ADM = - (46)
vd vd

From equations (43), (44) and (46), we have,


h fe R C
⇒ ADM = - (47)
h ie
B. Differential mode gain for differential input and single ended output
v01 h
ADM = = - fe R C (48)
vd 2h ie

Similarly, we can obtain the gain for second half to the differential amplifier with negative input
voltage as under,
v02 h
ADM = = fe R C (49)
vd 2h ie

Case-III : Using re - model of BJT


Replacing Q1by its re – model, the ac equivalent circuit of half part with positive input voltage
becomes as shown in Fig. 9.

ib +
ib
RC v01
+ (1+ )ib
vd + vBE re

2 – –

Fig. 9 Small signal equivalent circuit of half part of differential amplifier using re-model

vd
From input loop, = re(1 + β)ib (50)
2

vd
⇒ ib = (51)
2(1 + β)re

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vd
Output voltage, v01 = – RCβib = – RCβ (52)
2(1 + β)re

v01 βR C
⇒ = – (53)
vd 2(1 + β)re

 Similarly, we can obtain the gain for second half to the differential amplifier with negative input
voltage as under,

v02 βR C
= + (54)
vd 2(1 + β)re

A. Differential mode gain for dual input balanced output


v01 - v02 v v
ADM = = 01 - 02 (55)
vd vd vd

From equations (53), (54) and (55), we have,


β RC
⇒ ADM = – (56)
(1 + β)re

RC
⇒ ADM ≈ – (57)
re

B. Differential mode gain for dual input unbalanced output


v01 β RC
ADM = + –
= (58)
vd 2(1 + β)re

⇒ ADM ≈ (59)
2r

Similarly, we can obtain the gain for second half to the differential amplifier with negative input
voltage as under,
v02 R C
ADM = ≈ (60)
vd 2re

2.4 Common Mode Gain


For obtaining the common mode gain of the differential amplifier, the input voltages vin1 and vin2 are
increased by an incremental value vc. Therefore, small signal input for common mode gain, vin1 = vin2
= vc. The equivalent circuit of each half of the amplifier for common mode can be drawn by splitting
resistance RE to 2RE for each half as shown in Fig. 10.
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RC RC
v01 v02 B

vc + + vc
– 2RE 2RE –

Fig. 10 The equivalent of half part of differential amplifier for common mode input

Case-I : Using p-model
Replacing biasing source by ground and BJT (Q1) by its π-model, the ac equivalent circuit half part
of the circuit becomes as shown in Fig. 11.
B ib ic
+ +
vBE r gmvBE
E v01
vc +
–  RC
ie
2RE

Fig. 11 Small signal equivalent circuit of half part using π-model of


BJT model for common mode input

v BE
Emitter currents ie = ib + ic = + g m v BE (61)
rp

1 
⇒ ie =  + g m  v BE (62)
 rp 
From input loop, vc = vBE + 2REie (63)
1 
⇒ vc = vBE + 2RE  + g m  v BE (64)
 rp 

1
⇒ vBE = · vC (65)
1 
1 + 2R E  + g m 
 rp 
Outpu voltage, v01 = – RC gm vBE (66)
gm R C
⇒ v01 = – ·vc (67)
1 
1 + 2R E  + g m 
 rp 

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v01 gm R C
⇒ = – (68)
vc 1 
1 + 2R E  + g m 
 rp 

01 g m R C rp
⇒ = – (69)
rp + (1 + g m rp )2R E
Similarly, we can obtain the gain for second half to the differential amplifier as under,
v02 g m rp R C
= – (70)
vc rp + (1 + g m rp )2R E

Common mode gain,


v01 v02 -g m rp R c
ACM = = = (71)
vc vc rp + (1 + g m rp )2R E

Gain of BJT, β = gm rπ (72)


-βR C
⇒ ACM = (73)
rp + (1 + β)2R E

Since b >> 1 so rp + (1+b)2RE ≈ (1+b)2RE ≈ 2 bRE (74)


RC
⇒ ACM ≈ – (75)
2R E

Case-II : Using approximate h-parameter model


Replacing biasing source by ground and BJT by its approximate h-parameter model, the small signal
equivalent of half part of the amplifier becomes as shown in Fig. 12.
ib ic
+
hie hfeib
E v01
vc –+ RC
(1+hfe)ib
2RE

Fig. 12 Small signal equivalent circuit of half part using approximate h-parameter
Model of BJT for common mode input
Applying KVL in input loop, we have,
vc = [ h ie + (1 + h fe )2R E ] i b (76)

vc
⇒ ib = (77)
h ie + (1 + h fe )2R E

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Output voltage, v01 = – RC hfeib (78)
v01 h fe R C
⇒ = – (79)
vc h ie + (1 + h fe )2R E

Similarly, we can obtain the gain for second half to the differential amplifier as under,
v02 h fe R C
= – (80)
vc h ie + (1 + h fe )2R E

v01 v02
Common mode gain, ACM = = (81)
vc vc

h fe R C
⇒ ACM = – (82)
h ie + (1 + h fe )2R E
RC
If hfe >> 1 then, ACM ≈ – (83)
2R E

Case-III : Using re-model of BJT


Replacing biasing source by ground and BJT by its re-model, the a.c. equivalent circuit of half part of
the circuit becomes as shown in Fig. 13.
C
+
ib
ib
RC
B (1+)ib
re v01
vc +
– E
2RE

Fig. 13 Small signal equivalent circuit of half part using approximate


re-model of BJT for common mode input

Applying KVL in input loop, we have,


vc = (1 + β) (re + 2RE) ib (84)
1
ib = · vc (85)
(1 + β) (re + 2R E )

1
Output voltage v01 = – β RCib = – β RC · vc (86)
(1 + β) (re + 2R E )

v01 R Cβ
⇒ = – (87)
vc (1 + β)(re + 2R E )

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v02 R Cβ
Similarly, = – (88)
vc (1 + β)(re + 2R E )

v01 v02
Common mode gain, ACM = = (89)
vc vc

β RC
⇒ ACM = – (90)
(1 + β)(re + 2R E )

RC
If β is large then, ACM ≈ – (91)
2R E

3 MOSFET Based Differential Amplifier


Fig. 14 shows the circuit diagrams of MOSFET based differential amplifiers with vin1 and vin2 as inputs and
vo1 and vo2 as outputs of the amplifier. It is assumed that both transistors Q1 and Q 2 are matched and
biased at constant current level I.
+VDD

RD RD

vo1 iD1 iD2 vo2

Q1 Q2
vin1 + + + + vin2
– vGS vGS –
– S –

RS I

–VSS

Fig.14 Differential amplifier using MOSFETs


3.1 D.C Analysis
Case-I : Operation with common mode input voltage.
I
For common input, vin1 = vin2 = vc and for match transistors, iD1 = i D2 = . Fig. 15 shows the circuit
2
diagram of common mode operation.

Voltage at source terminal, v s = vc – vGS (92)

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+VDD

RD RD
I I
2 vo1 vo2 2
G G

+ I I +
vc + vGS _
– 2 2 _ vGS
S

RS I

–VSS
Fig.15 Common mode operation of differential amplifier using MOSFETs

Drain current of each MOSFET,


I 1 W
k n ( v GS - VT )
2
iD1 = i D2= = (93)
2 2 L

Where kn = µn Cox (94)


W/L is aspect ratio of channel of MOSFET, VT is threshold voltage.
I
⇒ vGS – VT = k  W  (95)
n 
 L

Output voltages at drain terminals of MOSFETs,


I
vo1 = v=
o2 VDD - R D (96)
2

 I   I 
Differential output, vo = vo1 – vo2 =  VD - R D  -  VDD - R D  =
0 (97)
 2   2 

At the boundary of ohmic and saturation region of MOSFET,


vD = vG - VT (98)
⇒ vG = VT + vD (99)
Above equation gives maximum value of VG for MOSFET to remain in saturation. For the common
mode arrangement of differential amplifier,
I
vG = vc,max , vD = VDD - × R D (100)
2

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The maximum value of common mode input voltage at which both MOSFETs remain in saturation,
can be obtained by putting above relation from equation (100) in equation (99), as under,
I
vc, max = VT + VDD - R D (101)
2

Note : Differential amplifier gives zero differential output (vo = vo1 – vo2) as long as both MOSFETs operate
I
in saturation with i=
D1 i D2
= .
2

Case-II : Operation with differential input voltage


For differential mode, vin1 = vd and vin2 = 0

+VDD

RD RD

vo1 iD1 iD2 vo2

vd + + +
– vGS2 vGS2
– S –

RS I

–VSS
Fig.16 Differential mode operation of differential amplifier using MOSFETs

From above circuit, vd = vin1 – vin2


When vd is positive , vGS1 > vGS2, iD1 > iD2 and vo1 > vo2 so differential output vo1 – vo2 is positive. When
vd is negative, vGS1 < vGS2, iD1 < iD2 and vo1 < vo2 so vo1 – vo2 is negative.
In differential mode, the value differential input voltage vd is selected such that whole of current I
flows either through Q1 or through Q2.
Let vd is selected such that iD1 = I and iD2 = 0 and vGS2 is reduced to a value equal to threshold voltage.
∴ vGS2 = VT and vs = – VT

1 W
k n ( v GS1 - VT )
2
Then, iD1 = I
= (102)
2 L
2I
⇒ vGS1 = VT + (103)
W
k 
 L

The value of vd at which entire current I flows through Q1 is,

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2I
vd = vGS1 + vs = VT + - VT (104)
W
kn  
L

2I
⇒ vd = (105)
W
kn  
 L

2I
Similarly, on negative value of v d = - entire current flows through Q2.
W
k 
 L
Output voltages at drain voltage terminals,
vo1 = VDD – IRD (106)
vo2= VDD – 0 × RD = VDD (107)
Differential output voltage, vo = vo1 – vo2 = VDD – IRD – VDD = – IRD (108)
3.2 Differential Mode Gain of MOSFET Based Differential Amplifier
The differential mode gain of MOSFET based differential amplifier is obtained by performing
small signal analysis on the amplifier similar to a BJT based amplifier. The small signal analysis is
performed by replacing biasing sources by ground and MOSFET by its small signal model. For small
signal analysis both inputs of transistors are changed by incremental values. The input of transistor
Q1 is increased by an incremental value of vd/2 and input of Q2 is decreased by value vd/2. The small
signal inputs for differential mode gain can be taken as,
vd v
vin1 = , and vin2 = - d (109)
2 2
For differential mode, the source terminal ‘S’ in Fig. 14 remains at zero potential for constant current
I. So, for small signal analysis terminal ‘S’ is taken at zero potential. If both transistors are identical,
the AC output voltage can be obtained by taking each half of differential amplifier with single
MOSFET as show in Fig. 18.

RD RD

D vo1 vo2 D
G G

vd + +  vd
2 – S S –
2

Fig. 18 Differential amplifier with differential input split into two equal halves

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The small signal equivalent circuit of each half can be drawn by replacing MOSFET by its small
signal model as shown below,
G
vo1
+
vd vgs gmvgs ro RD
+
2 –

S

Fig. 19 Small signal equivalent circuit of half part of MOSFET


based differential amplifier

Output voltage of half circuit with Q1,


vo1 = - gm (ro || RD) vg (110)

vd
⇒ vo1 = - g m ( ro || R D ) × (111)
2

v o1 g m ( ro || R D )
⇒ = - (112)
vd 2
Similarly, output of transistor Q2 can be obtained as under,
g (r || R D )
vD2 = + m o vd (113)
2

v o2 g m ( ro || R D )
⇒ = + (114)
vd 2

A. Differential input mode gain for dual input and balanced output,
v o1 - v o2 v o1 v o2
ADM = = - (115)
vd vd vd

g m ( ro || R D ) g m ( ro || R D )
and ADM = - - = -gm(ro||RD) (116)
2 2
If ro is infinite then ro || RD ≈ RD
⇒ ADM = -gmRD (117)
B. Differential input mode gain for dual input and unbalanced output,
v g
ADM1 = o1 = - m (g m || R D ) (118)
vd 2

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v o2 g
and ADM2 = = m (g m || R D ) (119)
vd 2
If ro is infinite then ro || RD ≈ RD

ADM1 = (120)

gm
ADM2 = RD (121)
2
3.3
Common Mode Gain of MOSFET Based Differential Amplifier
For common mode gain vin1 and vin2 are increased by an incremental value vc. Therefore, for common
mode gain incremental value of inputs of differential amplifier can be given by,
vin1 = vin2 = vc (122)
I
For common mode gain each half is biased at current .
2
The circuit for common mode can also be split into two equal half’s with degeneration resistance of
2RS in source circuit as shown in Fig. 20.

RD RD

vo1 vo2
G G
Q1 Q2

vc + 2RS 2RS
+ v
– – c

Fig. 20 Differential amplifier with common mode input split into two equal halves

Replacing MOSFET by its small signal model and dc bias sources by ground, the ac equivalent
circuit with transistor Q1 , the output voltage,vo1, for half part of differential amplifier becomes as
shown in Fig. 21.
G
vo1
+
vc + vgs gmvgs RD
– –
S 2RS

Fig. 21 Small signal equivalent circuit of each half for common mode input

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Output voltage, vo1 = - gmRDvgs (123)
From input circuit, vc = vgs + gm vgs × 2RS (124)
vc
⇒ vgs = (125)
1 + 2g m R S
Putting above expression of vgs in equation (123), we have,
gm R D
vo1 = - × vc (126)
1 + 2g m R S

gm R D
Similarly, vo2 = - - × vc (127)
1 + 2g m R S
A. Common mode gain for unbalanced or single ended output
v o1 v o2 RD
= = -
ACM = v c vc 1 (128)
+ 2R S
gm

1 1
Usually << R S ,so, + 2R S ≈ 2R S (129)
gm gm

RD
⇒ ACM ≈ - (130)
2R S

RD
⇒ |ACM | = (131)
2R S

B. Common mode gain for balanced or double ended output


 R D  R D 
- --   vc
v o2 - v o1  2R s  2R s  
=
ACM = = 0 (132)
vc vc

4. Common Mode Rejection Ration (CMRR)


The Common Mode Rejection Ration (CMRR) of differential amplifier is defined as ratio of the
differential mode gain to the common mode gain.
| A DM |
CMRR = (133)
| A CM |

4.1 CMRR of Differential Amplifier Using BJT


Case-I : Using p – model
Putting expressions of ADM from equation (38) and ACM from equation(73) in equation (133), we

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have,
gm R C
CMRR = (134)
β R C / [rp + (1 + β)2R E ]

gm
⇒ CMRR = [rp + (1 + β)2R E (135)
β

g m rp 1 + β
⇒ CMRR = + × 2R E g m (136)
β β

⇒ CMRR ≈ 1 + 2gmRE ≈ 2gmRE (137)


Case-II : Using approximate h-parameter model
Putting expressions of ADM from equation (47) and ACM from equation(82) in equation (133), we
have,
h fe R c
h ie
CMRR = (138)
h fe R C / [h ie + (1 + h fe )2R E ]

(1 + h fe )
⇒ CMRR = 1 + ·2R E (139)
h ie

1 + h fe h
⇒ CMRR ≈ ·2R E ≈ 2 fe ·R E (140)
h ie h ie

Case-III : Using re-model


Putting expressions of ADM from equation (56) and ACM from equation(90) in equation (133), we
have,
β RC
(1 + β) re
CMRR = (141)
β R C / [(1 + β)(2R E + re )]

re + 2R E 2R E
⇒ CMRR = ≈ (142)
re re

4.2 CMRR of Differential Amplifier Using MOSFET


Case-I : For dual input unbalanced output
Putting expressions of ADM from equation (121) and ACM from equation(131) in equation (133), we
have,

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gm R D
CMRR = gm R s (143)
2R

Case-II : For dual input balanced output


Putting expressions of ADM from equation (117) and ACM from equation(132) in equation (133), we
have,
g R
CMRR = m D = ∞ (144)
0

4.3 Methods of Improving CMRR


Ideally the common mode gain of a differential amplifier should be zero and common mode
rejection ratio should be infinite. The CMRR of differential amplifier can be improved by increasing
differential mode gain |ADM| and decreasing common mode gain, |ACM|. The common mode gain can
be decreased by increasing resistance RE, So, CMRR can be improved by increasing RE. Increase
in RE results the emitter voltage VEE will also have to be increased to maintain proper quiescent
current. If Q-point current is allowed to decrease that results in decrease in hfe and hence CMRR. This
problem can be eliminated by using constant current bias. If Q-point current is maintained constant,
the common mode gain becomes zero and hence circuit provider very high CMRR. The constant
current bias can be provided by using a current mirror in place of RE . The current mirror provides
very high impedance and hence very high CMRR. The differential amplifier with constant current
bias arrangement as shown in Fig. 22. The constant current source used for biasing of differential
amplifier is obtained by using a current mirror circuit.
+VDD
+VCC

RD RD
RC RC
v01 v02
vo1 iD1 iD2 vo2
+ v0 –
Q1 Q2 Q1 Q2
+ + + + +
vin1 + + vin2
vin1

~ VBE1

VBE2
– ~ –
vin2 – vGS
– –
vGS
+

I I

VEE –VSS

(a) BJT based Amplifier (b) MOSFET based Amplifier

Fig.22 Biasing of differential amplifier with current mirror

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5. Output of Differential Amplifier to an Arbitrarily Input Signal
Let vin1 = vc + vd (145)
vin2 = vc – vd (146)
⇒ vd = vin1 – vin2 (147)
v + vin 2
and vc = in1 (148)
2
Then outputs of Q1 & Q2 of differential amplifier are given by,
v01 = ADMvd + ACMvc (149)
v02 = - ADMvd + ACMvc (150)



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GATE QUESTIONS

Q.1 A change in the value of the emitter resistance, Re, in a difference amplifier
(a) Affects the difference mode gain Ad (b) Affects the common mode gain Ac
(c) Affects both Ad and Ac (d) Does not affect either Ad and Ac
GATE(EC/1995/1M)
Q.2 In a differential amplifier, CMRR can be improved by using an increased
(a) emitter resistance (b) collector resistance
(c) power supply voltage (d) source resistance
GATE(EC/1998/1M)
Q.3 The emitter coupled pair of BJT’s gives a linear transfer relation between the differential output
voltage and the differential input voltage Vid only when the magnitude of Vid is less α times the thermal
voltage, where α is
(a) 4 (b) 3
(c) 2 (d) 1
GATE(EC/1998/1M)
Q.4 In the differential amplifier of Fig. if the source resistance of the current source IEE is infinite, then
common-mode gain is
+Vcc

R R

Vin1 Vin2

IEE

–VEE
(a) zero (b) infinite
Vin 1 + Vin 2
(c) indeterminate (d)
2 VT

GATE(EC/2000/1M)
Q.5 If the differential voltage gain and the common mode voltage gain of a differential amplifier are 48
dB and 2 dB respectively, then its common mode rejection ratio is
(a) 23 dB (b) 25 dB
(c) 46 dB (d) 50 dB
GATE(EC/2003/1M)
Q.6 In an ideal differential amplifier shown in figure a large value of RE

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+VCC

RC RC

V1 + + V
– – 2

RE

– VEE

(a) increase both the differential and common - mode gains


(b) increase the common-mode gain only
(c) decrease the differential-mode gain only
(d) decreases the common-mode gain only
GATE(EC/2005/2M)

Common Data for questions Q.7 and Q. 8


The circuit shown in the figure uses three identical transistors with VBE = 0.7 V and β = 100.
Given R1 = R2 = R3 = 1 kΩ, kT/qe = 25 mV. The collector current of transistor Q3 is 2 mA.
+12 V

R1 R2
v0
vi Q1 Q2

VB Q3

R3

–12 V
Q.7 The bias voltage VB at the base of the transistor Q3 is approximately
(a) – 9.3 V (b) – 10.0 V
(c) – 10.3 V (d) – 11.0 V
GATE(IN/2009/2M)

Q.8 The small-signal voltage gain of the circuit is


(a) – 20 (b) – 40
(c) 20 (d) 40
GATE(IN/2009/2M)

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Q.9 In the differential amplifier shown in the figure, the magnitudes of th common-mode and differential-
mode gain are Acm and Ad, respectively. If the resistance RE is increased, then
+Vcc

RC RC
Vo _
+ Vin2
+
Vin1
_

RE Io

–VEE
(a) Acm increases (b) common-mode rejection ratio increases
(c) Ad increases (d) common-mode rejection ration decreases
GATE (EC-II/2014/1M)

Q.10 In the circuit shown, I1 = 80 mA and I2 = 4 mA. Transistors T1 and T2 are identical. Assume that the
thermal voltage VT is 26 mV at 27º C. At 50º C, the value of the voltage V12 = V1 – V2 (in mV) is
............
VS

I2 I1
V2 – +
V12 V1

T2 T1

GATE(EC-I/2015/2M)

Q.11 The circuit shown in the figure uses matched transistors with a thermal voltage VT = 25 mV. The
base currents of the transistors are negligible. The value of the resistance R in kΩ that is required to
provide 1µA bias current for the differential amplifier block shown in _____. (Give the answer up to
one decimal place).

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Differential Amplifiers EDC & ANALOG ELECTRONICS [26]
12V

Differential
R Amplifier

1 mA 1 µA

–12V
GATE(EE-I/2017/2M)

ANSWERS & EXPLANATIONS


Q.1 And.(b)
Vcc

Rc Rc

Vin1 Vin2

RE

–VEE

Differential mode gian of differential amplifier is given by,


h fe R C
ADM = – ......(i)
h ie

Common mode gain is given by,


h fe R C
ACM = – .....(ii)
h ie + (1 + h fe ) × 2R E

From equation (i) & (ii), it clear that change in RE results in change in Acm only
Q.2 Ans.(a)
The CMRR of a differential amplifier is given by,
CMRR = 1 + 2gmRE ≈ 2gmRE

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Thus CMRR of differential amplifier can be increased by increasing transconductance of BJT and
emitter resister RE.
Q.3 Ans.(d)
Transfer characteristics of emitter coupled differential amplifier is linear when differential input
voltage is less than or equal to thermal voltage.
∴ For linear transfer characteristics
|Vid| ≤ αVT
where, α = 1
Transfer characteristics of differential amplifier,
linear region

–4V–2V +2V+4V
The circuit behaves good limiter for vin > 4V
Q.4 Ans.(a)
Differential amplifier with emitter resistance is as shown below,
+Vcc

Rc Rc

Vin1 Vin2
+ Vo –

RE

–VEE

Differential mode gain of above circuit,


h fe R c
ADM = –
h ie

Common mode gain of circuits


h fe R c
ACM =
h ie + (1 + h fe )2R E

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+Vcc

R R

Vin1 Vin2

IEE

–VEE

when resistance of current source shown in above figure is infinite,


RE = ∞
h fe R c
A cm
∴ = = 0
h ie + ∞

Q.5 Ans.(c)
Common mode rejection ratio of differential amplifier is given by
Ad
CMRR =
Ac

Ad
In dB, CMRRdB = 20 log10
Ac

⇒ CMRRdB = 20 log10 Ad – 20 log10 Ac


⇒ CMRRdB = Ad,dB – Ac,dB
Given, Ad,dB = 48dB, Ac,dB = 2 dB
∴ CMRRdc = 48 – 2 = 46 dB

Q.6 Ans.(d)
+VCC

RC RC

V1 +
– V2

RE
– VEE

The differential mode gain of differential amplifier,

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h fe R c
ADM = − ......(i)
h ie

The common mode gain,


h fe R c
ACM = – ......(ii)
h ie + (1 + h fc ) × 2R E

From equation (i) & (ii), it is clear increase in RE results in decrease in common mode gain only.
Q.7 Ans.(a)
+VCC=12V

R1 R2
Vo
Vi Q1 Q2
+ +
VBE IE1 IE2
VBE
– –
IC3=2mA

VB Q3
+
VBE
– IE3
R3
VEE= –12V
Given, β = 100, VBE = 0.7 V,
R1 = R2 = R3 = 1 kΩ
IC3 = 2 mA
Applying KVL in base circuit of Q3, we have,
VB – VBE – IE3 R3 + 12 = 0
Emitter current,
1   1 
IE3 = IB3 + IC3 =  + 1 IC3 =  + 1 × 2 mA
 β   100 

 1 
⇒ VB − 0.7 −  + 1 × 2 × 1 + 12 = 0
 100 

⇒ VB = – 12 + 0.7 + 2.02 = – 9.28 V


⇒ VB ≈ – 9.3 V
Q.8 Ans.(c)

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VCC=+12V

R1 R2
C1 IC C2 IC Vo
B1 B2
Vi Q1 Q2

IE IE
IC3=2IE

VB Q3
+
VBE
– IE3
R3
VEE= –12V

Given, IC3 = 2 mA, R1 = R2 = R3 = 1kΩ, β = 100


As all transistor are identical, So, IC1 = IC2 = IC,
IE1 = IE2 = IE & IC3 = 2IE
IC3 2
⇒ IE = = = 1mA
2 2

Collector current of Q1 and Q2,


1   1 
IC =  + 1 I E =  + 1 1
 β   100 

⇒ IC = 1.01 mA
Transconductance of Q3,
I 2
= = 0.08s
gm3 = C3
VT 25

Base resistance Q3,


β 100
rπ3 = = = 1.25 kΩ
g m3 0.08

Transconductance of Q1 & Q2,


IC 1.01
gm = = ≈ 0.04s
VT 25

Base resistance of Q1 & Q2,


β 100
rπ = = = 2.5 kΩ
gm 0.04

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Replacing BJTs by their small signal models and biasing voltage by ground, the ac equivalent circuit
of amplifier can be drawn as order,

R1 R2
ib1 B1 B2
Vi C1 Vo C1
+ ib2
r ib1 ib2
Vbe1
– (1 + )ib1 a (1 + )ib2

ib3 ic3
ib3
r3

R3

From above circuit, ib3 = 0


∴ ic3 = βib3 = 0
KCL at node (a),
(+β)ib1 = –(1 + β) ib2
Va
⇒ ib1 = − = –ib1 ......(i)

KCL at node (a),


Va Va − Vi
+ − βi b1 − βi b2 = 0 .....(ii)
rπ rπ

From (i) and (ii), we have,


2Va Vi
⇒ − = 0
rπ rπ

Vi = 2Va
Vi
Va = ....(iii)
2

Va
Base current of Q2, ib2 = − ....(iv)

From (iii) & (iv), we have,


1
⇒ ib2 = − Vin .....(v)
2rπ

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Output voltage of op-amp,
Vo = –R2i2
= –R2βib2 ....(vi)
From (v) & (vi), we have,
βR 2
Vo = − Vin
2rπ

Vo 100 × 1 × 103
∴ Voltage gain, Av = = = 20
Vin 2 × 2.5 × 10−3

Q.9 Ans.(b)
The differential mode gain of differential amplifier,
h fe R c
Ad = − ......(i)
h ie

The common mode gain,


h fe R c
Ac = –
......(ii)
h ie + (1 + h fc ) × 2R E

From equation (i) & (ii), it is clear increase in RE results in decrease in common mode gain only.
Common mode rejection ratio of differential amplifier is given by
Ad
CMRR =
Ac

The common mode rejection ratio (CMRR) increase in common mode gain ,Ac. Thus, common mode
rejection ratio increases with increase in resistance RE.
Q.10 Ans.(835 to 84.0)
VS

I2 I1
– +
V2 V12 V1

T1 T2

IE2 = I2 IE1 = I1

The emitter current of BJT is given by

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V
Is VBET
IE = e
α
Where, Is is saturation current,
VBE1 − VBE 2
I E1 I α VT
⇒ = s1 × 2 ⋅ e
IE 2 α1 Is2
For identical BJTs, Is1= Is2 = Is and α1 = α2 = α
I
∴ VBE1 – VBE2 = VT n E1

IE 2
For given circuit, VBE1 = V1, VBE2 = V2
IE1 = I1
and IE2 = I2
I
⇒ V1 – V2 = VT n 1 .....(i)
I2
Thermal voltage is given by,
T
VT = V
11600
where T is temperature in °K.
At 50°C, T = 273 + 50 = 323 °K
323
∴ VT = V
11600
Given, I1 = 80 mA, I2 = 4 mA
Putting above values of VT, I1 and I2 in equation (i) we have,
323 80
V12 = V1 – V2 = n = 83.4 mV
11600 4

Q.11 Ans.:170 to 174


+12V

R1 Differential
Amplifier

IC2 = 1µA
IC1 = 1mA

Q1 Q2

–12V

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Collector current of BJT is given by
VBE
V
IC = Is e T

Where Is is saturation current


VBE1 − VBe 2
Ι C1 I VT
⇒ IC2
= s1 e
Is2
For identical or matched transistors, Is1 = Is2 = Is
VBE1 − VBe 2
Ι C1 VT
⇒ IC2
= e
IC1
⇒ VBE1 – VBE2 = VT n
IC2

Given, VT = 25 mV, IC1 = 1 mA, IC2 = 1 µA

1 × 10−3
⇒ VBE1 – VBE2 = 25 n = 75 n10 mV
1 × 10−6
Applying KVL in emitter circuits of both BJTs, we have,
VBE1 – VBE2 – IE2 R = 0
VBE1 − VBE 2 75 × 10−3 n10
⇒ =
R = kΩ
IE 2 IE 2
If base current of BJTs negligible.
Then IE2 = IC2 + IB2 ≈ IC2
75 × 10−3 n10 75 × 10−3 n10
⇒ R = = = 122.6 kΩ

Ic2 10−6



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