2023-24-Answer Key Cit-Eee-19ee61-Power Electronics-I Mid Semester Examination

COIMBATORE INSTITUTE OF TECHNOLOGY
(Government Aided Autonomous Institution Affiliated to Anna University)
COIMBATORE – 641 014.

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINERRING
(III-Year/VI Semester B.E. Electrical and Electronics Engineering)
SECTION - I
I MID SEMESTER EXAMINATION

19EE61 - POWER ELECTRONICS
08.04.2024 – 10.00AM-12.30PM
ANSWER KEY
PART-A
(10 x 2 = 20 Marks)
PART-A
(10x2=20 Marks)
1. With the precise definition, list the goals of Power Electronics.
Power Electronics is the technology associated with the efficient Conversion,
Control and Conditioning of electrical power / energy by static / solid state
means from the available electrical input form into the desired electrical output
form. (1 mark)
The following are the goals of Power Electronics System are
· High efficiency
· High availability
· High reliability
· Small size
· Light weight and
· Low cost (1 mark)
2. Draw the ideal IV characteristics of Power Diode.
a)Diode symbol b) ideal characteristic

(2 marks)
3. The reverse recovery current of a power diode is 4 µs and the rate of fall of
current is about 25 A/µs. Calculate (a) the storage charge and (b) the peak
reverse current IRR.
(1 mark)
(1 mark)
CIT/EEE/III YEAR/VI SEM BE/SECTION-I/I MID SEMESTER EXAMINATION/19EE61-POWER ELECTRONICS-ANSWER KEY-April 2024/ECS PAGE 1
4. Draw the two transistor model of a SCR and hence write the expression for anode
current.
(1 mark)
Anode Current (Ia)
(1 mark)
5. Differentiate between the thyristor and transistor family semiconductor power
devices.
Thyristor family of devices possess semi- controlled characteristics. These can be
turned on by applying a control signal to the gate terminal. The thyristor remains in the
on state even if the gate signal is removed. It will be turned off by applying the reversing
voltage across anode to cathode or by reducing the anode current below the holding
current value. (1 mark)
Power transistors possess controlled characteristics. These can be turned on by
applying a control signal to the base, or control terminal. The transistor remains in the
on state as long as the control signal is present. With the removal of the control signal, it
gets turned off. (1 mark)
6. Why the power MOSFET can work at high switching frequency?
In a power MOSFET, conduction is due to the majority charge carriers only, and
therefore, time delays caused by the removal or recombination of minority carriers are
eliminated. Thus, the power MOSFET can work at a high-switching frequency (in the
range of MHz).
(2 marks)
7. Justify the following statement:
IGBT is preferred as power switch over power BJT and power MOSFET in Modern
Power Electronics Industry
An IGBT combines the strengths of the BJT and MOSFET into a single device. The
input is essentially a voltage controlled MOSFET gate with high input impedance.
Driving IGBTs is simple and requires low power. (1 mark)
The output stage of the BJT portion of the design offers very high power gain and
output current flow. It doesn’t have secondary breakdown. This allows for a smaller die
size with the possibility of more economical manufacturing costs. Hence the IGBT is
preferred in all industrial applications. (1 mark)
8. What is time ratio control?
In the time ratio control method, the ON time period of the switch can be controlled
keeping the total time period constant. This technique is known as pulse width
modulation (PWM). (1 mark)
The other method of time ratio control is that either TON or TOFF is kept constant
and the total time period T will be varied. This method is called as frequency
modulation.
(1 mark)
9. Why the peak-peak ripple current is lower in buck regulator than boost
regulator?
( )
In buck converter the peak to peak ripple current is given by ΔI= . (1 mark)
In the case of boost converter the peak to peak ripple current is given by ΔI=
(1 mark)
From the above equations it is understood that the peak to peak ripple current ∆I is
small in magnitude for buck converter than boost converter for a given value of ‘k’ i.e.
duty cycle.
10. A buck regulator has a resistive load of 10Ω and input voltage of 100V DC. If the
switching frequency is 1 kHz and duty cycle is 60%, determine the average output
voltage and input supply current.
Given Data:
Vs=100V, fs=1kHz
Duty Cycle (D)=60% ; 0.6
Load =10 Ω
Average Output Voltage (Vo) =kVs
=0.6*100/0.6
= 60.00V (1 mark)
Average Output Current (Io) =Vo/R
=60/10
=6.0Amps
Input Supply Current (Is) =kIo
=0.6*6
=3.6Amps (1 mark)
PART-B
(4X10=40 Marks)
11.
a) With neat block diagram describe the various components of a Power
Electronics System. (5 marks)
(2 marks)
Any power electronic system consists of power electronics converter and
controller including the corresponding measurement and interface circuits. Power
converters are used to convert electric power of one form to another using power
semiconductor device, whereas controllers are required to generate control signals
for turn on and turn off of switching devices. Subsequently, the required output
voltage at specified frequency is available at output terminals.
The source of electric power is dc generator, Photovoltaic (PV) Cell and
Battery, i.e., dc power and alternator and induction generator, i.e., ac power. The
controlled power flows from ac/dc power source to load through a power
electronics converter. The power converter is also called power semiconductor
converter or power modulator.
The output of a power electronics converter may be a variable dc or a
variable ac with variable voltage and frequency. Usually, the output of a power
converter depends upon the requirement of load.
When the load is three-phase induction motor, the converter output will be
adjustable ac voltage and frequency. If the load is dc motor, the converter output
will be adjustable dc voltage.
The feedback signals are the measured parameters of the load, i.e., voltage,
current, speed and position. These signals are used as input signals of controller.
The command signals are also applied to the controller. Then the feedback signals
are compared with the reference or command signals and accordingly the control
signals are generated by the controller to turn-on the semiconductor switches of
power converter. Consequently, the required output at the load is obtained.
The control circuit is the heart of the system as it provides triggering pulses
to power semiconductor switches of converter. The synchronizing circuit is
required for dc-to-ac converter and ac-to-ac converters circuits, but the
synchronizing circuit is not required for dc-to-dc converter.
(3 marks)
b) Distinguish between ideal switch and practical power semiconductor switch.
Ideal Power Semiconductor Switch Properties: (5 marks)
 infinite breakdown voltage,
 when the switch is off, there is zero current through the switch,
 when switch is on, there is zero voltage across the switch,
 the turn-on and turn-off transition times of ideal switches are zero,
 since the either the voltage or the current is always zero in an ideal switch,
the instantaneous dissipation which is the product of instantaneous voltage
and instantaneous current is always zero. (2 marks)
Non-Ideal (Practical) Power Semiconductor Switch Properties
 finite breakdown voltage,
 leakage current in the off-state,
 non-zero voltage across the switch in the on-state,
 non-zero turn-on and turn-off transition times,
 since there is some voltage across the switch in the on-state, and the
transition times are non-zero, there is non-zero dissipation which must be
managed. (2 marks)
12.
a) Describe the reverse recovery characteristics of Power Diode. Show that
reverse recovery time and peak inverse current are dependent upon storage
charge and rate of change of current. (7 marks)
The following fig. shows the reverse recovery characteristics of a power diode.
When a diode is switched off, the forward diode current decays to zero and the
diode continue to conduct in reverse direction due to storage charge carriers both
electrons and holes in the depletion region and semiconductor layers (p+, n– and
n+). The reverse current flows through the diode for a time trr.
(2 marks)
trr is known as reverse recovery time. Actually, the reverse recovery time trr is the
time interval from the instant t = t1 to the time t = t3. At t = t1, the forward diode
current becomes zero and at the instant t = t3 the reverse recovery current reduces
to 25% of its peak value. When the reverse recovery current decreases to zero, the
diode regains its blocking capability.
The reverse recovery time consists of ta and tb, i.e., trr = ta + tb. ta is the time
between t = t1 and t = t2. At time t = t1, the forward diode current becomes zero and
at t = t2, current through the diode reaches the peak reverse current IRR. During
this time interval ta, the stored charge in depletion region can be removed
completely. tb is the time interval between t = t2 and t = t3. tb can be determined
from the instant of peak reverse current IRM to the instant reverse recovery current
reduces to 25% of its peak value. During the time interval tb, the storage charge in
p+, n– and n+ semiconductor layers is removed. (2 marks)
(1 mark)
Therefore, it can be seen that trr and IRM depend on storage charge and the
rate of change of current di/dt. The stored change depends upon the forward diode
current IF.
(2 marks)
b) Classify the power diodes based on its reverse recovery characteristics.
(3 marks)
The power diodes are classified based on reverse recovery characteristics as:
(i) General purpose diodes
 has relatively high reverse recovery time – in the order of 25µs
 Current ratings from 1 A to several thousand amperes
 Voltage ratings from 50 V to 5 kV.
 Applications: battery charging, electric traction, electroplating, welding and
UPS. (1 mark)
(ii) Fast reverse recovery diodes
 Has reverse recovery time of about 5 µs
 Current ratings from 1 A to several thousand amperes
 Voltage ratings from 50 V to 3 kV.
 For voltage ratings below 400 V, epitaxial process is used for diode
fabrication – reverse recovery time as low as 50 ns
 For voltage ratings above 400 V, diffusion technique is used for diode
fabrication – platinum and gold doping is carried out to reduce the reverse
recovery time. But, on state voltage drop is increases.
 Applications: choppers, commutation circuits, induction heating and SMPS.
(1 mark)
(iii) Schottky diodes
 Instead of pn-junction, it uses metal- to –semiconductor junction. Usually,
Al-Si junction.
 Has lower cut-in voltage, higher reverse leakage current, higher operating
frequency.
 Forward current ratings from 1 A to 300 A.
 Reverse voltage ratings are limited to 100 V.
 Applications: high frequency instrumentation and switching power supplies.
(1 mark)
13.
a) Explain Draw the VI-characteristics of SCR and describe the three modes of its
operation. Also specify the significance of holding current and latching
current. (5 marks)
Three modes of operation in an SCR are:
(i) Forward Blocking Mode (OFF State)
(ii) Forward Conducting Mode (ON State)
(iii) Reverse Blocking Mode (OFF State)
(1 mark)
Forward Blocking Mode
During the FBM, the anode is a positive w.r.t cathode, with the gate circuit open,
that is, no gate pulse is applied. So, the junctions J1 and J3 are FB, whereas junction J2 is
RB, and therefore, a small current called the forward leakage current flows from the
anode to cathode, as shown above. In this mode, the device offers high impedance, and
therefore, the thyristor is treated as an open switch (OFF state). (1 mark)
Forward Conducting Mode
During the FCM, the anode is a positive w.r.t. cathode, and the gate pulse is applied
between the gate and cathode. So, all three junctions J1, J2 and J3 become FB, and
therefore, a large current starts flowing from the anode to cathode with a very small
voltage drop across it (1–2 V). In this mode, the thyristor is in the on state and behaves
like a closed switch. (1 mark)
Reverse Blocking Mode (RBM)
During this mode, the cathode is a positive w.r.t. anode with switch S open, that
is, no gate pulse is applied. So the thyristor is RB, as shown in Figure 2.17a. The
junctions J1 and J3 are RB, whereas junction J2 is FB. The device behaves like two
diodes connected in series with reverse voltage applied across them. So, a small
reverse leakage current (of order of mA or µA) flows from the cathode to anode during
this mode. (1 mark)
If the reverse voltage is further increased to the critical breakdown level called as
reverse breakdown voltage (VBR), an avalanche occurs at junctions J1 and J3. As a
result, the reverse current increases rapidly. This large reverse current gives rise to
more losses, which may damage the device due to the rise in junction temperature
beyond its permissible limit. So, it must be ensured that the maximum working reverse
voltage across the thyristor does not exceed VBR.
The holding current is the minimum amount of anode current to maintain the SCR in
ON state with gate current applied. If the gate signal is removed, the device shifts from
ON state to OFF state. Hence, in designing the commutation circuit, it is important to
know about the value of holding current. The minimum amount of anode current to
maintain the device in ON state even without gate supply. Hence, while designing the
triggering circuit, this value should be considered.
(1 mark)
b) In the figure shown below, a thyristor is connected in series with R-L load. The
latching current is 75 mA. When a firing pulse of 100 µs is applied in between
gate and cathode, find the state of thyristor whether it is turned-on or turned-
OFF.
(5 marks)
R = 10 Ω, L = 0.25 H, V = 200 V, IL = 75 mA, t = 100 µs.

When the thyristor is turned ON, the current will increase exponentially due to
inductive load. The load current can be expressed by
(1 mark)
(1 mark)
(2 marks)
Since the value of current is greater than latching current, thyristor operates in
turned-ON state. (1 mark)
14.
a) With construction details, describe the operation and transfer characteristics
of enhancement type n-channel MOSFET. (5 marks)
Power metal-oxide semiconductor field-effect transistors (MOSFETs) have
been developed using the field-effect concept and MOS technology. It has three
terminals, drain (D), source (S), and gate (G).
On a p-substrate (or body), two heavily doped n+ regions are diffused as. An
insulating layer of silicon dioxide (SiO2) is grown on the surface, and then it is
etched to embed a metallic source and drain terminals. The n+ region makes contact
with the source and drain terminals. A layer of metal is also deposited on the SiO2
layer to form a gate of MOSFET. In a power MOSFET, conduction is due to the
majority charge carriers only. (1 mark)
An n-channel enhancement-type MOSFET has no physical channel, as shown below.
(2 marks)
If VGS is positive, an induced voltage attracts the electrons from the p-
substrate and accumulates them at the surface beneath the oxide layer. If VGS is
greater than or equal to a value known as threshold voltage VT, a sufficient number
of electrons are accumulated to form a virtual n-channel, as shown by shaded lines
in and the current flows from the drain to source. Because a depletion MOSFET
remains on at zero gate voltage, whereas an enhancement-type MOSFET remains off
at zero gate voltage, the enhancement-type MOSFETS are generally used as
switching devices in power electronics. The transfer characteristics is shown below.
(2 marks)
(1 mark)
b) Explain the turn-off process of GTO with its two-transistor model. (5 marks)
A gate turn-off thyristor (GTO) is a three terminal power semiconductor device.
GTOs belong to a thyristor family having a four-layer structure. GTOs also belong to
a group of power semiconductor devices that have the ability for full control of on-
and off-states via the control terminal (gate).
To turn-OFF a GTO, the gate terminal voltage is negative with respect to the
cathode terminal so that gate-cathode is negative biased. Actually, the holes injected
from the anode are taken out from the p base through the gate metallization into the
gate terminal. Hence, the voltage drop across the p base and the n emitter of
transistor T2 starts reverse biasing the junction J3 and electron injection stops.
When the electron injection stops completely, depletion layer starts to grow on both
junctions J2 and J3. Subsequently, the device once again starts blocking forward
voltage. The cathode current has stop and the anode to gate current continues to
flow as the n base excess carriers diffuse towards junction J1. This current is called
‘tail current’. The amplitude of tail current decays exponentially as the n base excess
carriers will be reduced by recombination. When the tail current becomes zero, the
device regain its steady state blocking characteristics and GTO operates in off-state.
(1 mark)
The performance of GTO can be analyzed using two transistor model of
thyristor. In the equivalent circuit, both transistors T1
and T2 are saturated when the GTO is in ON state. When the base
current to transistor T2 is less than the value needed to maintain
saturation, i.e., IB2<IC2/β2, subsequently transistor T2 operates in
active mode and the gate turn-OFF thyristor starts to turn-OFF as
the regenerative action present in the circuit when both transistors
T1and T2 operate in active mode or any one transistor operates
in active mode. In the equivalent circuit of GTO as shown below,
(1 mark)
(1 mark)
(2 marks)
15.
a) Compare and Contrast symmetrical IGBT and anti-symmetrical IGBT.
(5 marks)
There are two types of IGBT namely
1. Symmetrical IGBT or non-punch through IGBT and
2. Anti-symmetrical IGBT or punch through IGBT
1. Symmetrical IGBT :
The depletion region of junction J2 can be extended into the n–drain drift region as
the p-type body region is doped heavily compared to the n– drain drift region. The
thickness of n– drain drift region will be such that the depletion region of junction J2
can be accommodated and the depletion layer boundary cannot touch the p+ injecting
layer. This type of IGBT is called as a symmetrical IGBT or non-punch through IGBT.
Due to absence of n+ buffer region, the reverse blocking voltage is equal to the forward
blocking voltage. The reverse voltage blocking capability of IGBT is useful in ac circuit
applications. (2 marks)
2. Anti-symmetrical IGBT
In anti-symmetrical IGBT, the thickness of the n– drift region is reduced by a factor
of 2 and the device becomes a punch through structure. In this case, the depletion layer
can be extended into the complete n- drift region when applied voltage is significantly
less than the breakdown voltage. Subsequently, the depletion layer boundary can able
to touch the p+ injecting layer. The reach-through of the depletion layer to the p+
injecting layer can be avoided by adding an n+ buffer region between the n– drain drift
region and the p+ injecting layer. This type of IGBT structure is called an anti-
symmetric IGBT or punch–through IGBT. Due to small length of n– drift region, the on-
state loss of IGBT will be less. Since the n+ buffer region is present with in the device,
the reverse blocking capability of anti-symmetric IGBT or punch–through IGBT is low.
Therefore, these types of IGBT are not suitable for ac circuit applications. (3 marks)
b) With neat waveforms, explain the turn off characteristics of IGBT. Also discuss
why the turn off time of IGBT is larger than that of Power MOSFET? (5 marks)
The dynamic characteristics or switching characteristics can be explained with
respect to turn-on and turn-off times of IGBT.
After turn on the IGBT, the collector-emitter voltage falls to small value called ON-
state voltage drop VCES where S represents the saturated value.
(2 marks)
The above figure shows the turn-OFF switching characteristics of IGBT which is
somewhat complex and the bipolar transistor plays an important role to understand
the switching characteristics of a IGBT. The total turn-OFF time toff consists of delay
time td(off) and rise time, initial fall time tf1 and final fall time tf2. The total turn-off
time toff can be expressed as
toff = td(off) + tf 1 + tf 2.
The delay time td(off) is the required time during which the gate-emitter voltage
falls from VGE to the threshold voltage VGE(th). Since the gate-emitter voltage falls
to VGE(th) during td(off), the collector current falls from rated value (IC) to the 90%
of the rated collector current (0.9IC). At the end of delay time td(off), the collector-
emitter voltage starts to rise. The first fall time tf 1 is the time during which the
collector current falls from the 90% of the rated collector current (0.9IC) to the 20%
of the rated collector current (0.2IC) or time during which the collector emitter
voltage rises from VCES to 10% of VCE(0.1VCE). The final fall time tf2 is the time
during which the collector current falls from the 20% of the rated collector current
(0.2IC) to the 10% of the rated collector current (0.1IC) or time during which the
collector emitter voltage rises from 10% of VCE (0.1VCE) to final value of VCE.
Because of tail time tf2 which is due to BJT, the total turn off time is increased when
compared to Power MOSFET. (3 marks)
16.
a) Compare SCR, MOSFET, and IGBT with respect to (i). operating frequency
(ii)V-I rating (iii) voltage drop (iv)trigger circuit (v)applications (5 marks)
Parameters SCR MOSFET IGBT
Operating 400 to 500 Hz 100kHZ 10-50kHz
Frequency
V-I Rating 12000V/6500A 1000V/600A 6500V/1200A
Voltage Drop in <2 4-5 3
Volts
Trigger Circuit Current Controlled Voltage Controlled Voltage Controlled
needs single pulse to needs continuous needs continuous
turn on gate drive gate drive
Applications AC-DC Converters DC-DC Converters, DC-DC Converters,
AC-AC Voltage DC-AC Inverters DC-AC Inverters
Controllers/Cyclo (Low and Medium (High Power)
Converters Power)
b) Describe the current limit control employed in DC-DC converters (5 marks)

In dc-to-dc converters, it is necessary to keep the output load current
constant. For this, the ON time period and OFF time period of dc chopper must be
controlled in such a way that the switch is ON when Io is less than Imin and the
switch becomes OFF if Io is greater than Imax. Hence the load current can be varied
with in Imin and Imax. (2 marks)
The following figure shows the current limit control of DC-DC converter. The
switching frequency of DC-DC converter circuit can be controlled by proper setting
of maximum output current Imax and minimum output current Imin.
The ripple current is equal to
To reduce the amplitude of ripple current, the switching frequency will be high and
subsequently the switching loss will be high. (3 marks)
17.
a) Derive the expressions for peak to peak ripple current and ripple voltage for a
non-isolated DC-DC buck regulator. (5 marks)
In a buck regulator, the average output voltage Vo is less than the input voltage, Vs
—hence the name “buck,” a very popular regulator. The circuit diagram of a buck regulator
is shown below. Transistor Q1 acts as a controlled switch and diode Dm is an uncontrolled
switch.
The circuit operation can be divided into two modes. Mode 1 begins when transistor
Q1 is switched on at t = 0. The input current, which rises, flows through filter inductor L,
filter capacitor C, and load resistor R.
Mode 2 begins when transistor Q1 is switched off at t = t1. The freewheeling diode
Dm conducts due to energy stored in the inductor, and the inductor current continues to
flow through L, C, load, and diode Dm. The inductor current falls until transistor Q1 is
switched on again in the next cycle. The equivalent circuits for the modes of operation are
shown below.
The waveforms for the voltages and currents are shown for a continuous current
flow in the inductor L. It is assumed that the current rises and falls linearly.
(1 mark)
Modes of operation
Waveforms of voltage, inductor current, capacitor voltage for continuous mode

(2 marks)
(2 marks)
b) A buck regulator has an input voltage of Vs = 15 V. The required average

output voltage is V0 = 7 V at R = 500Ω, and the peak-to-peak output ripple
voltage is 30 mV. The switching frequency is 30 kHz. If the peak-to-peak ripple
current of inductor is limited to 0.8 A, determine (i) the duty cycle, (ii) the
filter inductance L, and (iii) the filter capacitor C.
(1 mark)
(2 marks)
(2 marks)
18.
a) With neat circuit diagram and waveforms explain the operation of boost
regulator. (5 marks)
The circuit topology of boost regulator is depicted in the figure shown below.
The circuit consists of an inductor (L), Power Semiconductor Switch (IGBT/Power
MOSFET), diode (D), capacitor(C). In this regulator the output voltage can be above
the input DC voltage V by varying the duty cycle D of the switch.
(1 mark)
Mode I
The equivalent circuit for mode I is shown below.
When the switch is ON, energy stored in the inductor and current rises linearly from
I1 to I2. The voltage across the inductor is equal to the input voltage. Since the diode
is off, the output voltage Vo is the voltage across capacitor. As the capacitor value is
large, the load current is constant. (1 mark)
𝐼 −𝐼 ∆𝐼
𝑉=𝐿 =L
𝑡 𝑡
Mode II
The equivalent circuit for mode II is shown below.
When the switch is turned OFF, a negative voltage 𝑉 = 𝐿 is developed across the
inductor. Consequently, the voltage across the load will be V+VL, which is greater
than the input voltage. Then the stored energy in the inductor is transferred to
capacitor through diode and the inductor current falls linearly from I2 to I1.
(1 mark)
𝐼 −𝐼 ∆𝐼
𝑉𝑜 − 𝑉 = 𝐿 =L
𝑡 𝑡
t1=DT and t2=(1-D)T
k – duty cycle
T-Time period
From the above equations
𝑉
𝑂𝑢𝑡𝑝𝑢𝑡 𝑉𝑜𝑙𝑡𝑎𝑔𝑒(𝑉 ) =
1−𝑘
𝑉𝑘
𝑃𝑒𝑎𝑘 𝑡𝑜 𝑃𝑒𝑎𝑘 𝑅𝑖𝑝𝑝𝑙𝑒 𝐶𝑢𝑟𝑟𝑒𝑛𝑡(∆𝐼) =
𝑓𝐿
𝐼 𝑘
𝑃𝑒𝑎𝑘 𝑡𝑜 𝑃𝑒𝑎𝑘 𝑅𝑖𝑝𝑝𝑙𝑒 𝑉𝑜𝑙𝑡𝑎𝑔𝑒(∆𝑉 ) =
𝑓𝐶
The waveforms for mode I and mode II are shown below.
(2 marks)
b) A boost regulator has an input voltage of Vs = 7 V. The average output voltage
V0 = 15 V and the average load current I0 = 0.8 A. The switching frequency is
30 kHz. If L = 150 μH and C = 220 μF, determine (i) the duty cycle (ii) the
ripple current of inductor ΔI, (ii) the peak current of inductor I2, (iv) the
ripple voltage of filter capacitor ΔVC (5 marks)
`
(1 mark)
(1 mark)
(1 mark)
(1 mark)
(1 mark)
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COIMBATORE INSTITUTE OF TECHNOLOGY

(Government Aided Autonomous Institution Affiliated to Anna University)

COIMBATORE – 641 014.

I MID SEMESTER EXAMINATION

2. Draw the ideal IV characteristics of Power Diode.

a)Diode symbol b) ideal characteristic

R = 10 Ω, L = 0.25 H, V = 200 V, IL = 75 mA, t = 100 µs.

b) Describe the current limit control employed in DC-DC converters (5 marks)

Waveforms of voltage, inductor current, capacitor voltage for continuous mode

b) A buck regulator has an input voltage of Vs = 15 V. The required average

The waveforms for mode I and mode II are shown below.

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