0% found this document useful (0 votes)
4 views23 pages

23 Sc Module1 ADE AK

Download as pdf or txt
0% found this document useful (0 votes)
4 views23 pages

23 Sc Module1 ADE AK

Download as pdf or txt
Download as pdf or txt
You are on page 1/ 23

Module 1 23EEE135

Module 1: Introduction to Digital circuits & Combinational circuits


I. Introduction
Combinational logic deals with techniques of combining basic gates, to produce some
desired function. Eg. Adders, Comparators, Decoders, Multiplexers etc,,
The output of a combinational logic circuit depends only on the current input and does not
need any memory element. Let x0, x1,….,xn be input Boolean variables and y0, y1,….,ym
be the output Boolean variables. The desired function be represented as Y = F(X). The
representation of the combinational logic is shown in figure 1.

Combinational Fig 1: Representation of


circuit Combinational circuit

II. Digital Combinational Design Stages


The design of combinational circuit follows the following steps:
a. Problem Statement
b. Construction of Truth Table for the given problem statement
c. Generation of Switching equation from the truth table
d. Simplification of the switching equation to reduce the complexity of the circuit
e. Draw the logic diagram
f. Implement the logic diagram drawn.

The steps are shown in block diagram in Figure 2

Problem Construction of Generation of Simplification of


Truth Table switching equation
Statement
equation

Fig 2: Block Diagram of Combinational Building of Logic


Logic diagram
circuit Design stages
writing Circuit

III. Problem statement to Truth Table:


The problem statement which is required to be implemented has to be rewritten in the
form of a truth table. This forms the first and the most important step in combinational
circuit design. From the truth table the switching equation are to be written, simplified
and implemented.

Compiled by A. Kumar, Dept of EEE, BNMIT Page 1


Module 1 23EEE135
The steps followed to develop the truth table from problem statement is given below:
a. Determine the no. of input and output variables involved.
b. Assign symbols for each variables (Boolean Variables)
c. The size of the truth table is dependent on input variable. If there are ‘n’ input
variables the truth table will have 2n possible values.
d. Construct the truth table containing all input variable combinations.[Use weightage of
Powers of 2, starting from LSB]
e. For each input combination, based on the problem statement, identify the output as
either ‘1’ or ‘0’

Problems:

1. Mr. X buys a two wheeler. The maximum load on the vehicle permitted is 100 kgs.
Mr. X weighs 70 kgs. His friends Y and Z weigh 50 kgs each. Develop a digital
system to generate an alarm when the vehicle is overloaded.

Input variable: X,Y and Z, Output variable: F


If X=1 indicates Mr. X is seated on the vehicle & If X=0 Mr. X is not-seated on vehicle
Similarly for Mr Y and Mr Z.
If F=1, it indicates overload
Requirement: Output, F, should be ‘1’ when there is overload (Weight > 100 kgs)
Since we have 3 input variable (X, Y, Z), there will be 23 = 8 combinations possible

22 = 4 21 = 2 20 = 1
F
X Y Z
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
2. Design a combinational circuit truth table such that output is generated when
majority of 4 inputs are TRUE

Input Variables: A,B,C and D, Output variables: Y


Requirement: Output, Y, should be ‘1’ if majority of inputs (>=3) are ‘1’
Since we have 4 input variables, there will be 24 = 16 combinations possible

Compiled by A. Kumar, Dept of EEE, BNMIT Page 2


Module 1 23EEE135
3 2 1 0
2 =8 2 =4 2 =2 2 =1 Output
Value
A B C D Y
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1
12 1 1 0 0 0
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
3. An electric motor powering a conveyor is to be turned on if,
a) One or two operators are in position b) If the material is present c) Protective
interlock switch is not open (CLOSED)

Input variables: A and B represent 2 operators. ‘1’ indicates they are in position
M – represents the materials, ‘1’ indicates material is present in conveyor
S – interlock switch, ‘1’ indicates switch is closed (not open)
Output Variable: Motor_On, ‘1’ indicates motor to be on

23=8 22=4 21=2 20=1 Output


Value
A B M S Motor_on
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1
12 1 1 0 0 0
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 1

Compiled by A. Kumar, Dept of EEE, BNMIT Page 3


Module 1 23EEE135
IV. Deriving switching equations from Truth Table:
Each input variable group that produces a logical ‘1’ in a truth table output columns
can be form a term in a Boolean switching equation.
Eg. X = A B C + A B C. Note that each AND term (also called a product term)
identifies one input condition where the output is a ‘1’
Certain definitions related to switching equations are given below:
a. Literal: It is a Boolean Variable or its complement. Eg. X, X
b. Product Term: It is a literal made of AND of multiple literals. Eg. AB, XYZ
c. Sum Term: It is OR of multiple literals. Eg. (A + B), (X + Z)
d. Sum of Products (SOP) : It is OR of multiple product terms. Eg. XY + XYZ
e. Product of Sum (POS) : It is AND of multiple sum terms. Eg. (A+B)(A+C)
f. MinTerm: It is associated with SOP. It is a product term that contains all input
variables (not more than once). It is represented by ‘mx’.
g. MaxTerm: It is associated with POS. It is a sum term that contains all input
variables (not more than once). It is represented by ‘Mx’.
h. Canonical SOP: It is a complete set of minterms that define output variable
when it is at logical ‘1’. SOP expression in canonical form is represented by Σ.
i. Canonical POS: It is a complete set of maxterms that define output variable
when it is at logical ‘0’. POS expression in canonical form is represented by π.

Table below shows MinTerm and MaxTerm symbol and expression for a 3-variable.

Compiled by A. Kumar, Dept of EEE, BNMIT Page 4


Module 1 23EEE135
To derive the switching function from truth table in canonical form the steps to be followed
are:
i) For SOP switching expression:
a) Identify from the truth table the rows with output as ‘1’
b) Check the input combination. For each of the cases with output = ‘1’, write the minterm
with literal as compliment, if value of the literal is ‘0’ and directly, if the value of literal
is ‘1’
c) OR all the combinations identified in previous step.
ii) For POS switching expression:
a) Identify from the truth table the rows with output as ‘0’
b) Check the input combination. For each of the cases with output = ‘0’, write the maxterm
with literal as compliment, if value of the literal is ‘1’ and directly, if the value of literal
is ‘0’
c) AND all the combinations identified in previous step.

1. Mr. X buys a two wheeler. The maximum load on the vehicle permitted is 100 kgs.
Mr. X weighs 70 kgs. His friends Y and Z weigh 50 kgs each. Develop a digital
system to generate an alarm when the vehicle is overloaded.

Input variable: X,Y and Z, Output variable: F


If X=1 indicates Mr. X is seated on the vehicle & If X=0 Mr. X is not-seated on vehicle
Similarly for Mr Y and Mr Z.
If F=1, it indicates overload
Requirement: Output, F, should be ‘1’ when there is overload (Weight > 100 kgs)
Since we have 3 input variable (X, Y, Z), there will be 23 = 8 combinations possible

22 = 4 21 = 2 20 = 1
F
X Y Z The switching function for the
0 0 0 0 table is:
0 0 1 0
0 1 0 0 F=
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
2. Design a combinational circuit switching equation such that output is generated
when majority of 4 inputs are TRUE

Input Variables: A, B, C and D, Output variables: Y


Requirement: Output, Y, should be ‘1’ if majority of inputs (>=3) are ‘1’
Since we have 4 input variables, there will be 24 = 16 combinations possible

Compiled by A. Kumar, Dept of EEE, BNMIT Page 5


Module 1 23EEE135

23=8 22=4 21=2 20=1 Output


Value
A B C D Y
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1 A’BCD
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1 AB’CD
12 1 1 0 0 0 ABC’D
13 1 1 0 1 1
14 1 1 1 0 1 ABCD’
ABCD
15 1 1 1 1 1

The switching function for the table is:

F = A’BCD + AB’CD + ABC’D + ABCD’ + ABCD

V. Representing expression in Canonical form


It is necessary to represent the expressions in canonical form for simplification process.
The steps to represent incomplete expressions into complete canonical form are;
SOP expression:
a. Identify the missing term(variable) in each of the AND term (Product term)
b. AND the missing term and its compliment with original AND term
Eg. Term: XY, Then canonical form is XY(Z + Z’) = XYZ + XYZ’
c. Expand and identify the terms

POS expression:
a. Identify the missing term(variable) in each of the OR term (SUM term)
b. OR missing term and its compliment with the original OR term
Eg. Term: (X+Y), Then canonical form is (X+Y)+ZZ’ = (X+Y+Z)(X+Y+Z’)
c. Expand and identify the terms

Problems:
1. Express the equation f(a,b,c) = ab’ + ac’ + bc in standard canonical form and write it
in decimal form
Solution: Identify the missing literal in each term and AND the term with the OR of variable
and its compliment, i.e. f = ab’(c+c’) + ac’(b+b’) + bc(a+a’), expanding we get,

Compiled by A. Kumar, Dept of EEE, BNMIT Page 6


Module 1 23EEE135
f = ab’c + ab’c’ + abc’ + ab’c’ + abc + a’bc
Identify the similar terms and eliminate one of them, (Hint: A + A = A) canonical SOP
expression will be,
f = ab’c + ab’c’ + abc’ + abc + a’bc
Identify the corresponding minterm decimal form values, we get
f = Σ 5,4,6,7,3
Therefore rearranging the terms we get the canonical expression in decimal form is,
f (a, b, c) = Σ 3, 4, 5, 6, 7

2. Express the equation f(w,x,y,z) = w’x + yz’ in standard canonical form and write it
in decimal form
Solution: There are two literals missing in each term. Hence consider one at a time and obtain
the canonical form.
Identify the missing literal in each term and AND the term with the OR of variable and
its compliment, i.e. f = w’x (y+y’) + yz’ (w+w’), expanding we get,
f = w’xy + w’xy’ + wyz’ + w’yz’
f = w’xy (z+z’) + w’xy’ (z+z’) + wyz’ (x+x’) + w’yz’ (x+x’)
f = w’xyz + w’xyz’ + w’xy’z + w’xy’z’ + wxyz’ + wx’yz’ + w’xyz’ + w’x’yz’
Identify the similar terms and eliminate one of them, (Hint: A + A = A) canonical SOP
expression will be,
f = w’xyz + w’xyz’ + w’xy’z + w’xy’z’ + wxyz’ + wx’yz’ + w’x’yz’
Identify the corresponding minterm decimal form values, we get
f = Σ 7, 6, 5, 4, 14, 10, 2
Therefore rearranging the terms we get the canonical expression in decimal form is,
f (w, x, y, z) = Σ 2, 4, 5, 6, 7, 10, 14

3. Express the equation f(a,b,c) = (a+b’)(b’+c) in standard canonical form and write it
in decimal form
Solution: Identify the missing literal in each term and OR the term with the AND of variable
and its compliment,
i.e. f = [ (a + b’)+cc’ ] [ (b’ + c)+aa’], expanding we get,
f = (a+ b’ + c) (a +b’ + c’) (a + b’+ c)(a’ + b’ + c)
Identify the similar terms and eliminate one of them, (Hint: A . A = A) canonical POS
expression will be,
f = ( a + b’ + c) ( a + b’ +c’ ) ( a’ + b’ + c )
Identify the corresponding minterm decimal form values, we get
f = π (M2, M3, M6)
Therefore rearranging the terms we get the canonical expression in decimal form is,
f (a, b, c) = π ( M2 , M3, M6 ) or π (2 , 3, 6)

Compiled by A. Kumar, Dept of EEE, BNMIT Page 7


Module 1 23EEE135
VI. Converting from SOP to POS and vice-versa
Steps: SOP to POS
1. Write a SOP equation for compliment of the given function.
2. Take compliment on both sides.
3. Apply De-Morgan’s to get the converted POS equivalent.
Steps: POS to SOP
1. Write a POS equation for compliment of the given function.
2. Take compliment on both sides.
3. Apply De-Morgan’s to get the converted SOP equivalent.
1. Convert the expression to POS. f(A.B.C) = Σ(0,1,3,4,7)
S1: The compliment of the function is given below:
F’ = Σ (2,5,6) = A’BC’ + AB’C )+ ABC’
S2: Take compliment on both sides:

F = F = ( A’BC’ + AB’C + ABC’) = (A’BC’) (AB’C) (ABC’)


= (A + B’ + C) (A’ + B + C’) (A’ + B’ + C)
= π (M2, M5, M6)
VII. Generating switching function from a problem statement
With the awareness of how to represent the canonical form and writing expression
from truth table, the complete stages of generating switching function for a problem
statement is discussed below with examples.
1. Mr. X buys a two wheeler. The maximum load on the vehicle permitted is 100
kgs. Mr. X weighs 70 kgs. His friends Y and Z weigh 50 kgs each. Develop a
digital system to generate an alarm when the vehicle is overloaded.
Input variable: X,Y and Z, Output variable: F
If X=1 indicates Mr. X is seated on the vehicle & If X=0 Mr. X is not-seated on vehicle
Similarly for Mr Y and Mr Z.
If F=1, it indicates overload
Requirement: Output, F, should be ‘1’ when there is overload (Weight > 100 kgs)
Since we have 3 input variable (X, Y, Z), there will be 23 = 8 combinations possible
22 = 4 21 = 2 20 = 1
F
X Y Z
0 0 0 0 The switching function for the
0 0 1 0
table is:
0 1 0 0
0 1 1 0 F=
1 0 0 0
1 0 1 1 F(X,Y,Z) = Σ (5, 6, 7) or
1 1 0 1
1 1 1 1 = Σ (m5 , m6, m7)

Compiled by A. Kumar, Dept of EEE, BNMIT Page 8


Module 1 23EEE135

2. Design a combinational circuit switching equation such that output is generated


when majority of 4 inputs are TRUE
Input Variables: A, B, C and D, Output variables: Y
Requirement: Output, Y, should be ‘1’ if majority of inputs (>=3) are ‘1’
Since we have 4 input variables, there will be 24 = 16 combinations possible

23=8 22=4 21=2 20=1 Output


Value
A B C D Y
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1 A’BCD
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1 AB’CD
12 1 1 0 0 0 ABC’D
13 1 1 0 1 1
14 1 1 1 0 1 ABCD’
ABCD
15 1 1 1 1 1

The switching function for the table is:


F = A’BCD + AB’CD + ABC’D + ABCD’ + ABCD
(Or) F(A,B,C,D) = Σ (7, 11, 13, 14, 15)
(or) F(A,B,C,D) = Σ (m7, m11, m13, m14, m15)

3. Output of a digital circuit is to be ‘1’ when value of input >3. The weightage of
input variables are A=3, B=3, C=2 and D= -1
Input Variables: A,B,C,D and Output variables: F
Requirement: Output, F, should be ‘1’ if combined weightage of inputs >3
Since we have 4 input variables, there will be 24 = 16 combinations possible

Compiled by A. Kumar, Dept of EEE, BNMIT Page 9


Module 1 23EEE135

23=8 22=4 21=2 20=1 Output


Value
A B C D Y
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0 A’BCD’
6 0 1 1 0 1
7 0 1 1 1 1 A’BCD
8 1 0 0 0 0
9 1 0 0 1 0 AB’CD’
10 1 0 1 0 1
11 1 0 1 1 1 AB’CD ABC’D’
12 1 1 0 0 1 ABC’D
13 1 1 0 1 1
14 1 1 1 0 1 ABCD’
ABCD
15 1 1 1 1 1

The switching function for the table is:


F = A’BCD’ + A’BCD + AB’CD’ + AB’CD + ABC’D’ + ABC’D + ABCD’ + ABCD
(Or) F(A,B,C,D) = Σ (6, 7, 10, 11, 12, 13, 14, 15)
(or) F(A,B,C,D) = Σ (m6, m7, m10 , m11, m12, m13, m14, m15)

4. Write the minterm and maxterm Boolean expression for the truth table below using
variable name and in decimal format
Inputs Outputs
Note:
A B C W X
For minterm expression, consider the outputs
0 0 0 0 1
when in ‘1’ state
0 0 1 1 0
0 1 0 0 1
For maxterm expression, consider the outputs
0 1 1 1 1
when in ‘0’ state
1 0 0 1 0
1 0 1 0 1
1 1 0 0 0
1 1 1 1 1

i. Minterm expression:
w = a’b’c + a’bc + ab’c’ + abc --------- using variable name
w = Σ (m1, m3, m4 , m7) (or) w = Σ (1,3,4,7) --- decimal form
x = a’b’c’ + a’bc’ + a’bc + ab’c + abc ---- using variable name
x = Σ (m0, m2, m3 , m5 ,m7) (or) w = Σ (0,2,3,5,7) --- decimal form

Compiled by A. Kumar, Dept of EEE, BNMIT Page 10


Module 1 23EEE135

ii. Maxterm expression:


w = (a + b + c) (a + b’+ c) (a’ + b + c’) (a’ + b’ + c) --------- using variable name
w = π (M0, M2, M5 , M6) (or) w = π (0,2,5,6) --- decimal form
x = (a + b+ c’) (a’ + b + c) (a’ + b’ + c) ---- using variable name
x = π (M1, M4, M6 ) (or) w = π (1,4,6) --- decimal form

VIII. Karnaugh Maps (or) K-Maps


In case of a digital circuit design, after the switching equation is generated, the next important
stage is to simplify the switching equation. Simplification of switching equations reduces the
amount of hardware needed to realize the function. Reduction of gates and gate inputs will
result in fewer ICs which in turn decreases cost and improves reliability.

There are several methods for simplification. Use of Boolean algebra is one of the methods.
But the process is lengthy and prone to human errors. A better approach is to use Karnaugh
Map.

K-Map is a matrix of squares. The number of boxes or square depends on the number of input
variables. If there are ‘n’ input variables, then K-Map will have 2n boxes. Each box represents
a minterm or maxterm of Boolean equation. If the given equation is in terms of minterms, then
‘1’ is entered into the square that represents that term. A maxterm is represented by a ‘0’

a) Three variable-Maps
For 3-variable switching equations, there will be 8 minterms. Therefore, K-Map will have
8 (23) squares. Let a,b,c be the three Boolean variables with ‘a’ as MSB, the mapping of
minterms for a 3-variable K-map is shown below:

 There is wrap-around in the K-map:


 a'b'c' (m0) is adjacent to a'bc' (m2)
 ab'c' (m4) is adjacent to abc' (m6)
 Each cell in a 3-variable K-map has 3 adjacent neighbours. In general, each cell in an n-
variable K-map has ‘n’ adjacent neighbours. For example, m0 has 3 adjacent neighbours:
m1, m2 and m4.

Compiled by A. Kumar, Dept of EEE, BNMIT Page 11


Module 1 23EEE135

b) Four variable-Maps
For 4-variable switching equations, there will be 16 minterms. Therefore, K-Map will have
16 (24) squares. Let a, b, c, d, be the four Boolean variables with ‘a’ as MSB, the mapping
of minterms for a 4-variable K-map is shown below:

 There are 2 wrap-arounds: a horizontal wrap-around and a vertical wrap-around.


 Every cell thus has 4 neighbours. For example, the cell corresponding to minterm m0 has
neighbours m1, m2, m4 and m8.

c) Steps to solve using K-Map


The steps to be followed to solve a Boolean expression using K-Map is given below:
 Identify the no. of variables in the expression [n] and keep expression in standard SOP
form.
• Construct no. of squares = 2n ,where n is no. of variables in expression
 In a K-map, mark ‘1’ In squares corresponding to minterm given in function F.
 Mark the remaining squares as ‘0’
 Group cells/squares containing adjacent ‘1’ (group must have size in powers of twos: 1, 2,
4, 8, …). Then identify simpler product term for each group,

Compiled by A. Kumar, Dept of EEE, BNMIT Page 12


Module 1 23EEE135
 Group of 2 adjacent 1’s is called : PAIR & gives a reduction of literals by 1
 Group of 4 adjacent 1’s is called : Quad & gives a reduction of literals by 2
 Group of 8 adjacent 1’s is called : Octet & gives a reduction of literals by 3
 Group ‘1’ such that all the ‘1’ are covered with minimum groups. Solve the groups to get
the solution.[Hint: Larger group size but minimum no. of groups]
 Note: 1. Larger the group is, the fewer the number of literals in the resulting product term.
2. Valid Grouping and invalid grouping examples

Valid
Valid Groupings
Groupings

In-Valid In-Valid
Groupings Groupings

Definitions:
 Prime Implicant: A set of 2m K-map cells are combined to form prime implicant. A prime
implicant is a product term obtained by combining the maximum possible number of
minterms from adjacent squares in the map. Use bigger groupings (prime implicant)
wherever possible.

 Essential Prime Implicant: It is a prime implicant that includes atleast one minterm that
is not covered by any other prime implicant.

Redundant Prime
Implicant

Essential Prime Implicant

Compiled by A. Kumar, Dept of EEE, BNMIT Page 13


Module 1 23EEE135
d) Problems on 3 and 4 variable K-Maps:
I. Generate the simplified switching function for the following equations:
i. F(a, b, c) = Σ (1,2,3,6,7)

Solution: f = a’c + b

ii. F(x, y, z) = Σ(0,2,4,6)

Solution: f = z’

iii. F(X,Y,Z) = Σ(0,2,3,4,5,7)

Solution: f = y’z’ + xz + x’y

Compiled by A. Kumar, Dept of EEE, BNMIT Page 14


Module 1 23EEE135
iv. F = a’bc + ab’c’ + abc

Solution: f = ab’c’ + bc

v. F(w, x, y, z) = Σ(0,1,4,5,9,11,13,15)

Solution: f = w’y’ + wz

vi. F = w’xy + wz’ + xyz’

Solution: f = wz’ + w’xy

Compiled by A. Kumar, Dept of EEE, BNMIT Page 15


Module 1 23EEE135

vii. F(a, b, c, d) = Σ (1,3,4,5,6,9,11,12,13,14)

Solution: f = c’d + b’d + bd’

II. K-map solution for incompletely specified functions (Don’t care terms)
When the output is not known for all possible combinations of input, then the
function is called incompletely specified functions. The minterms or maxterms that
are not used as part of output function are called don’t care terms.
 In K-Map don’t care terms are marked as ‘d’ or ‘x’.
 Don’t care terms can be treated as ‘0’ or ‘1’
 If don’t care terms help in creating larger group of minterms, then treat it as ‘1’.
 The aim is to solve 1’s using don’t care. If don’t care terms do not help to increase
the grouping size of minterms, then treat is as ‘0’

viii. F (a, b, c) = Σ ( 0,4,6) + Σ d(2,5,7)

Considering don’t care terms without considering don’t care terms

Solution: f = c’ Solution: f = b’c’ + ac’

Compiled by A. Kumar, Dept of EEE, BNMIT Page 16


Module 1 23EEE135

ix. F(a, b, c, d) = Σ(2,3,4,5,13,15) + Σ d(8,9,10,11)

Without considering don’t care terms considering don’t care terms

Solution: f = a’bc’ + a’b’c + abd Solution: f = ad + ac + a’bc’

x. F(w,x,y,z) = Σ(0,2,4,8,10,14) + Σ d(5,6,7,12)

Solution: f = z’

III. POS solution from K-Map for a SOP expression:


In case if POS solution is required for a given SOP expression the steps to be
followed are:

a. Construct the K-Map and mark ‘1’ corresponding to the given minterms
b. Mark ‘0’ in the remaining cells of K-map. This represents the compliment of
the given SOP expression,
c. Solve for 0’s and the result will be compliment of required final answer.
Compiled by A. Kumar, Dept of EEE, BNMIT Page 17
Module 1 23EEE135
d. Use De-Morgan’s theorem to obtain the POS solution.
xi. Obtain POS solution using K-map for the expression given below:
f(a, b, c, d) = Σ (0, 2, 5, 7, 8, 10, 13, 15)

Solution: f ’ = bd’ + b’d, Taking compliment on both sides, we get


F = ( bd’ + b’d )’ = ( bd’)’ . (b’d)’ --- [using De’morgan’s theorem ]

F = ( b’ + d) ( b + d’)

xii. Obtain POS solution using K-map for the expression below:
F(w, x, y, z) = Σ (1, 5,7,11,13) + Σ d(8, 14, 15)

Solution: f ’ = z’ + w’x’y + wx’y’ Taking compliment on both sides, we get


F = (z’ + w’x’y + wx’y’ )’ = (z’)’( w’x’y)’ (wx’y’)’ --- [using De’morgan’s theorem ]

F = z (w + x + y’) ( w’ + x + y)

Compiled by A. Kumar, Dept of EEE, BNMIT Page 18


Module 1 23EEE135

IV. Solving POS expression using K-Map:


In case if POS expression is given the steps to be followed are:
a. Construct the K-Map and mark ‘0’ corresponding to the given maxterms
b. Solve for 0’s and the result will be compliment of required final answer.
c. Use De-Morgan’s theorem to obtain the POS solution.

xiii. F(a, b, c, d) = π (2 ,3, 4, 6, 7, 10, 11, 12)

Solution: f ’ = bc’d’ + a’c + b’c Taking compliment on both sides, we get


(bc’d’ +F(w,
F =xiv. a’c x, y, z))’==π(bc’d’)’(
+ b’c (1, 3, 8, a’c)’
10, 12, 13, 14,
(b’c)’ [using De’morgan’s theorem ]
---15)
F = ( b’ + c + d) (a + c’) ( b + c’)

Solution: f ’ = wx + wz’ + w’x’z Taking compliment on both sides, we get


F = (wx + wz’ + w’x’z )’ = (wx)’( wz’)’ (w’x’z)’ --- [using De’morgan’s theorem ]
F = (w’ + x’) (w’ + z) ( w + x + z’)

Compiled by A. Kumar, Dept of EEE, BNMIT Page 19


Module 1 23EEE135

xv. F(w, x, x\y, z) = π (0, 4, 5, 7, 8, 9, 11, 12, 13, 15)

Solution: f ’ = y’z’ + xz + wz Taking compliment on both sides, we get


F = (y’z’ + xz + wz )’ = (y’z’)’( xz)’ (wz)’ --- [using De’morgan’s theorem ]
F = (y + z) ( x’ + z’) ( w’ + z’)

XI) Code Convertors: There are different numeric codes namely Excess-3 code, Gray code, 7-
sergment code to name a few.

a) BCD to Excess-3 code convertor: Excess-3 code is obtained 3 (0011) to the given BCD
code. Since BCD values are between 0-9, minterms 10-15 are treated as don’t cares while
designing. Consider the truth table showing BCD to Excess-3 code convertor :

BCD code Excess-3 code


B3 B2 B1 B0 E3 E2 E1 E0
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
The equations are:

E3 = f(B3B2B1B0) = Σ (5,6,7,8,9) + Σ d(10,11,12,13,14,15)


E2 = f(B3B2B1B0) = Σ (1,2,3,4,9) + Σ d(10,11,12,13,14,15)

Compiled by A. Kumar, Dept of EEE, BNMIT Page 20


Module 1 23EEE135
E1 = f(B3B2B1B0) = Σ (0,3,4,7,8) + Σ d(10,11,12,13,14,15)
E0 = f(B3B2B1B0) = Σ (0,2,4,6,8) + Σ d(10,11,12,13,14,15)

The realization circuit is shown below:

Compiled by A. Kumar, Dept of EEE, BNMIT Page 21


Module 1 23EEE135

b) BCD to 7-segment code convertor:


The figure below shows the various segments of a Common Cathode 7-segment display.

Here all the cathode points of the LED’s


are shorted and grounded. The anode
points form the input to control the
display.

A ‘1’ as input will make a segment ON

A ‘0’ as input will make a segment OFF

For eg. to display ‘1’ we need segment B


and C. Therefore the coding will be:

DP G F E D C B A
0 00 0 0 1 10

The display from 0 to 9 is shown below:

Compiled by A. Kumar, Dept of EEE, BNMIT Page 22


Module 1 23EEE135

Therefore the truth table for BCD to 7-segment code conversion is given below:

BCD inputs 7-segment code


B3 B2 B1 B0 DP G F E D C B A
0 0 0 0 0 0 1 1 1 1 1 1
0 0 0 1 0 0 0 0 0 1 1 0
0 0 1 0 0 1 0 1 1 0 1 1
0 0 1 1 0 1 0 0 1 1 1 1
0 1 0 0 0 1 1 0 0 1 1 0
0 1 0 1 0 1 1 0 1 1 0 1
0 1 1 0 0 1 1 1 1 1 0 1
0 1 1 1 0 0 0 0 0 1 1 1
1 0 0 0 0 1 1 1 1 1 1 1
1 0 0 1 0 1 1 0 1 1 1 1
Treat the values 10 to 15 as don’t cares.

NOTE: Students are advised to frame the equation for A to G. solve using K-
map and build the circuit as part of Assignment 1.

Compiled by A. Kumar, Dept of EEE, BNMIT Page 23

You might also like