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Cpe 320 Assignment 2023-1

Computer Engineering

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8 views3 pages

Cpe 320 Assignment 2023-1

Computer Engineering

Uploaded by

samboumatic
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
Download as pdf or txt
Download as pdf or txt
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CPE 320 ASSIGNMENT 2023

GROUP ONE

For the truth table below, derive the output Boolean expression and simplify it using K-map where
necessary. Implement the logic diagram for the simplified expression. Simulate your design using
Proteus or Simulink.

S/N INPUTS OUTPUTS


X Y Z A B
0 0 0 0 1 0
1 0 0 1 0 1
2 0 1 0 1 1
3 0 1 1 1 0
4 1 0 0 0 0
5 1 0 1 1 1
6 1 1 0 1 1
7 1 1 1 1 1
GROUP TWO
For the truth table below, derive the output Boolean expression and simplify it using K-map where
necessary. Implement the logic diagram for the simplified expression. Simulate your design using
Proteus or Simulink.
S/N INPUTS OUTPUTS
X Y Z A B
0 0 0 0 1 0
1 0 0 1 0 1
2 0 1 0 1 0
3 0 1 1 1 1
4 1 0 0 1 0
5 1 0 1 0 1
6 1 1 0 0 1
7 1 1 1 1 1
GROUP THREE

Deduce the truth table of the K-map below. Derive the simplest Boolean expression in terms of the
variables A,B,C and D. Implement the logic diagram for the simplified expression and simulate your
design using Simulink or Proteus.

GROUP FOUR
Implement the logic diagram for the Boolean expression below and simulate it using Simulink or
Proteus. Copy and complete the table below.
S/N Inputs Output
A B C D E
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
GROUP FIVE
Design a 3-to-8 decoder (binary-to-octal) and simulate your design either in Proteus or Simulink.
GROUP SIX
Design an 8-to-3 encoder (octal-to-binary) and simulate your design either in Proteus or Simulink.

GROUP SEVEN
Design a decimal-to-BCD encoder, use S0-S9 as inputs and A, B, C and D as outputs. Simulate your design
either in Proteus or Simulink.
GROUP EIGHT
Design a decimal-to-BCD encoder, use S0-S9 as inputs and A, B, C and D as outputs. Simulate your design
either in Proteus or Simulink.
GROUP NINE

For the truth table below, derive the output Boolean expression and simplify it using K-map where
necessary. Implement the logic diagram for the simplified expression. Simulate your design using
Proteus or Simulink.

S/N Inputs Outputs


A B C D putsX Y
0 0 0 0 0 1 0
1 0 0 0 1 0 1
2 0 0 1 0 0 0
3 0 0 1 1 1 0
4 0 1 0 0 1 0
5 0 1 0 1 1 1
6 0 1 1 0 1 1
7 0 1 1 1 1 1
8 1 0 0 0 0 0
9 1 0 0 1 1 0
10 1 0 1 0 0 0
11 1 0 1 1 0 0
12 1 1 0 0 1 1
13 1 1 0 1 1 1
14 1 1 1 0 0 0
15 1 1 1 1 0 1
GROUP TEN
Design a 2-bit input equality/inequality comparator logic circuit with three (3) outputs, the first for the
condition A<B, the second for the condition A=B, and the third for the condition A>B. Simulate your
design either in Simulink or Proteus.

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