DLD Unit 2 Combinational Circuits (2022)
DLD Unit 2 Combinational Circuits (2022)
0 0 0 0 0
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
7 1 1 1 1 f(A, B, C) = B'C + AB
• The input to combinational circuit is a 4 bit binary number x3x2x1x0.
Design a circuit with minmium hardware for the following
• Output y1=1 if the input binary number is 5 or less than 5
• Output y2=1 if the input binary number is 9 or more than 9
• Truth table
B C D Y
A
0 0 0 0 0 1
1 0 0 0 1 1
2 0 0 1 0 1
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 0
7 0 1 1 1 0
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 0
12 1 1 0 0 0
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 0
Adders
• Digital computers perform variety of information processing tasks, the
one is arithmetic operations.
• The most basic arithmetic operation is the addition of two binary
digits.
• 4 basic possible operations are:
• 0+0=0,
• 0+1=1,
• 1+0=1,
• 1+1=10
• 1+1+1=11
• The first three operations produce a sum whose length is one digit, but when
augends and addend bits are equal to 1,the binary sum consists of two digits.
The higher significant bit of this result is called a carry.
Half Adder
• A Half Adder is a combinational circuit with two binary inputs
(augends and addend bits and two binary outputs (sum and carry
bits.)
• It adds the two inputs (A and B) and produces the sum (S) and the
carry (C) bits.
• It is an arithmetic operation of addition of two single bit words.
• It is the basic building block for addition of two single bit numbers.
• Design a combinational logic circuit that performs arithmetic
operation for adding two bits using basic gates (Half Adder)
Truth table K-Map for Sum(S) K-Map for Carry(S)
1 0 0
1 1 0 0
+1 1 1 0
? 0 1 0
19
How to fix this
• We need to create an adder that can take a carry bit as an additional
input
• Inputs: A, B, carry in
• Outputs: sum, carry out
• This is called a full adder
• Will add A and B with a half-adder
• Will add the sum of that to the
carry in
Full Adders
• A Full-adder is a combinational circuit that adds two bits and a carry
and outputs a sum bit and a carry bit.
• To add two binary numbers, each having two or more bits, the LSBs
can be added by using a half-adder. The carry resulted from the
addition of the LSBs is carried over to the next significant column and
added to the two bits in that column.
• So, in the second and higher columns, the two data bits of that
column and the carry bit generated from the addition in the previous
column need to be added.
Full adder using two half adders logic
diagram
• Design a combinational logic circuit for the full adder using basic gates
Truth table
• Based on the truth table, the Boolean functions for Sum (S) and Carry – out
(COUT) can be derived using K – Map.
For sum(S) For Carryout
S= A’B’C+A’BC’+AB’C’+ABC
C=AB+AC+BC
S =(AꚚB)ꚚC
• Circuit using AND & OR gates
• Circuit using XOR, AND & OR gate only
• Circuit using two half adders & OR gate
Subtractor
• Subtractor circuits take two binary numbers as input and subtract one
binary number input from the other binary number input.
• Similar to adders, it gives out two outputs, difference and borrow
(carry-in the case of Adder).
• There are two types of subtractors
• Half Subtractor
• Full Subtractor
Half Subtractor
• The half-subtractor is a combinational circuit which is used to perform
subtraction of two bits. It has two inputs, X (minuend) and Y
(subtrahend) and two outputs D (difference) and B (borrow).
• The logic symbol and truth table are shown below
Design of Half Subtractor
• Truth Table
• K-map simplification
• Circuit Diagram
Full Subtractor
• A full subtractor is a combinational circuit that performs subtraction
involving three bits, namely minuend, subtrahend, and borrow-in.
• The logic symbol and truth table are shown below.
Design of Full Subtractor
Truth Table
• K-Map Simplification
• Difference=XꚚYꚚBin
• Logic diagram using two half adders
• Circuit Diagram