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Spartan-6 FPGA Packaging and Pinouts Product Specification - Xilinx

Spartan-6 FPGA Packaging and Pinouts Product Specification - Xilinx

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X-Ref Target - Figure 3-68<br />

A<br />

B<br />

C<br />

D<br />

E<br />

F<br />

G<br />

H<br />

J<br />

K<br />

L<br />

M<br />

N<br />

P<br />

R<br />

T<br />

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V<br />

W<br />

Y<br />

AA<br />

AB<br />

AC<br />

AD<br />

AE<br />

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AG<br />

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30<br />

4 4 4 4 0 0 101 101 101 0 0 0 123 123 123 0 5 5 5 5 A<br />

4 4 4 4 0 0 101 101 101 0 0 123 123 123 0 5 5 5 B<br />

4 4 4 0 0 101 101 101 0 123 123 123 0 5 5 5 5 C<br />

4 4 4 4 4 0 0 0 101 101 101 0 123 123 123 0 0 5 5 5 5 D<br />

4 4 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 5 5 5 5 E<br />

4 4 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 5 5 5 5 F<br />

4 4 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 5 5 5 5 G<br />

4 4 4 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 5 5 5 H<br />

4 4 4 4 4 0 0 0 0 0 0 0 0 0 5 5 5 5 J<br />

4 4 4 4 0 0 0 0 0 0 0 0 0 5 5 5 5 K<br />

4 4 4 4 4 4 0 0 0 0 0 0 0 0 0 0 5 5 5 5 5 5 L<br />

4 4 4 4 3 3 0 0 0 0 0 0 1 1 5 5 5 5 M<br />

3 3 3 3 3 3 3 3 5 5 1 1 1 1 N<br />

3 3 3 3 3 3 1 1 1 1 1 1 1 1 P<br />

3 3 3 3 3 3 1 1 1 1 1 1 1 1 R<br />

3 3 3 3 3 3 3 3 1 1 1 1 1 1 T<br />

3 3 3 3 3 3 1 1 1 1 1 1 U<br />

3 3 3 3 3 3 3 3 1 1 1 1 1 1 V<br />

3 3 3 3 3 3 3 3 3 2 2 2 2 1 1 1 1 1 1 1 1 W<br />

3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 Y<br />

3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 1 1 1 1 1 1 AA<br />

3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 AB<br />

3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 AC<br />

3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 AD<br />

3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 AE<br />

3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 1 1 AF<br />

3 3 3 3 2 2 2 245 245 245 2 267 267 267 2 2 1 1 1 1 1 AG<br />

3 3 3 3 3 2 2 2 245 245 245 2 267 267 267 2 1 1 1 AH<br />

3 3 3 2 245 245 245 2 2 267 267 267 2 2 1 1 1 AJ<br />

3 3 3 3 2 2 245 245 245 2 2 2 267 267 267 2 2 1 1 1<br />

AK<br />

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30<br />

UG385_c3_68_111909<br />

Figure 3-68: FG(G)900 Package—LX150T I/O Bank Diagram<br />

FG(G)900 Package—LX150T<br />

<strong>Spartan</strong>-6 <strong>FPGA</strong> <strong>Packaging</strong> www.xilinx.com 329<br />

UG385 (v2.2) August 24, 2011

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