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Spartan-6 FPGA Packaging and Pinouts Product Specification - Xilinx

Spartan-6 FPGA Packaging and Pinouts Product Specification - Xilinx

Spartan-6 FPGA Packaging and Pinouts Product Specification - Xilinx

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Chapter 2: Pinout Tables<br />

Table 2-6: FT(G)256 Package—LX9, LX16, <strong>and</strong> LX25 (Cont’d)<br />

Bank Pin Description Pin Number BUFIO2 Region No Connect (NC)<br />

3 IO_L52P_M3A8_3 B2 LT<br />

3 IO_L52N_M3A9_3 A2 LT<br />

3 IO_L53P_M3CKE_3 F4 LT<br />

3 IO_L53N_M3A12_3 F3 LT<br />

3 IO_L54P_M3RESET_3 E4 LT<br />

3 IO_L54N_M3A11_3 E3 LT<br />

3 IO_L55P_M3A13_3 F6 LT<br />

3 IO_L55N_M3A14_3 F5 LT<br />

3 IO_L83P_3 B3 LT<br />

3 IO_L83N_VREF_3 A3 LT<br />

NA GND A1 NA<br />

NA GND A16 NA<br />

NA GND B11 NA<br />

NA GND B7 NA<br />

NA GND D13 NA<br />

NA GND D4 NA<br />

NA GND E9 NA<br />

NA GND G15 NA<br />

NA GND G2 NA<br />

NA GND G8 NA<br />

NA GND H12 NA<br />

NA GND H7 NA<br />

NA GND H9 NA<br />

NA GND J5 NA<br />

NA GND J8 NA<br />

NA GND K7 NA<br />

NA GND K9 NA<br />

NA GND L15 NA<br />

NA GND L2 NA<br />

NA GND M8 NA<br />

NA GND N13 NA<br />

NA GND P3 NA<br />

NA GND R10 NA<br />

62 www.xilinx.com <strong>Spartan</strong>-6 <strong>FPGA</strong> <strong>Packaging</strong><br />

UG385 (v2.2) August 24, 2011

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