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EE 271 - LAB 1: Danang University of Technology and Science

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Duong Thai
This report describes the results of a lab experiment simulating a digital circuit using Verilog, including waveform outputs and a truth table for the circuit that does not match the simulation results due to timing delays in the code. Modifying the delays improves the match between the simulation and truth table. Verilog allows testing and designing digital circuits virtually with advantages like free use, useful tools, and ease of use.

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45 views5 pages

EE 271 - LAB 1: Danang University of Technology and Science

Uploaded by

Duong Thai
This report describes the results of a lab experiment simulating a digital circuit using Verilog, including waveform outputs and a truth table for the circuit that does not match the simulation results due to timing delays in the code. Modifying the delays improves the match between the simulation and truth table. Verilog allows testing and designing digital circuits virtually with advantages like free use, useful tools, and ease of use.

Copyright:

© All Rights Reserved
Download as DOCX, PDF, TXT or read online from Scribd
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Download as docx, pdf, or txt
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DANANG UNIVERSITY OF TECHNOLOGY AND SCIENCE

REPORT
EE 271 – LAB 1

By: Thái Bá Dương


Lê Xuân Anh Dũng
Dương Minh thắng
Class: 18ECE
Simulation results:
- Waveforms from original code:

- Text file output from original code:


Questions:
1. Draw a logic diagram using the logic gates that were used to build
the digital circuit in the Verilog source code. Use the same signal
names indicated in the source code. Use AND, OR, and NOT gates.

2. Draw the truth table for this circuit. Looking at the waveform from
your simulation may help. A truth table for a logic circuit has an
input side and an output side. The input side lists all of the possible
input combinations to the circuit and the output side lists the
value(s) of the output(s) for each input combination. Figure 4 below
shows the logic symbol and associated truth table for an AND gate.
The left hand side of the truth table elaborates all 4 possible input
combinations and the right hand side gives the corresponding
output.

Truth Table
A B C D T1 T2 T3 T4 T5 F
0 0 0 0 1 0 0 0 0 1

0 0 0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0 0

0 0 1 1 0 0 0 0 0 0

0 1 0 0 1 0 0 1 0 1

0 1 0 1 0 0 0 1 0 1
0 1 1 0 0 0 0 0 0 0

0 1 1 1 0 0 0 0 0 0

1 0 0 0 1 0 0 0 1 1

1 0 0 1 0 0 0 0 1 1

1 0 1 0 0 0 1 0 0 1

1 0 1 1 0 0 0 0 0 0

1 1 0 0 1 1 0 1 1 1

1 1 0 1 0 1 0 1 1 1

1 1 1 0 0 1 1 0 0 1

1 1 1 1 0 1 0 0 0 1

3. When you run the simulation. Does the output of the Verilog
program agree or disagree with your truth table?
- The output has a lot of different data from truth table because the
time delay is 10 seconds.
4. Please explain the apparently incorrect order in which the results in
the output log are printed; specifically when the output line
“Producing Glitch” prints.
- Because the time delay, the value of output lesseq is X when (A=0,
B=0, C=0, D=0) and lesseq is different from truth table when the
values of A, B, C, D increasing.

- Specifically, when the output line “Producing Glitch” prints, the value
of lesseq is set to 1 when (A=0, B=0, C=0, D=0).And after that when
(A=0, B=1, C=0, D=1) the value of lesseq change repeatly (from 0 to
1).
5. Change the value of the delay in the program from 10 to 0.
Rerun the simulation. Does the output of the Verilog program
agree or disagree with your truth table? Please explain any
differences.
- When the value of the delay is 0, the output of verilog agree with
our truth table.
- There are 3 values displayed at “Producing Glitch” line and it is
the same with the truth table.

- Another difference is the output changed from 0 to 1 very


quickly.

6. Change the delay in the program back to 10 time units.


Change the stimDelay in the test module to 5 time units. What
affect does this change have on the outputs of your
simulation?
- The delay of output is longer.

7. What advantages are there to using a program like Verilog?


Name three or more.
- Test logic circuit design for free (only for students).
- It has many useful tools.
- It is easy to use.

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