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ORCIDMichael S. Hsiao
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- affiliation: Virginia Tech, Blacksburg, VA, USA
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2020 – today
- 2022
[c191]Aditi, Michael S. Hsiao:
Hybrid Rule-based and Machine Learning System for Assertion Generation from Natural Language Specifications. ATS 2022: 126-131- [c190]Rahul Krishnamurthy, Michael S. Hsiao:
Automated Suggestions Framework for Processing Hardware Specifications Written in English. FDL 2022: 1-8 - [c189]Yue Zhan, Michael S. Hsiao:
A Hybrid Approach for Automatic Feedback Generation in Natural Language Programming. TransAI 2022: 32-39 - 2021
- [c188]Yue Zhan, Michael S. Hsiao:
Formal Validation for Natural Language Programming using Hierarchical Finite State Automata. ICAART (1) 2021: 506-515 - 2020
- [c187]Yue Zhan, Michael S. Hsiao:
Breaking Down High-level Robot Path-Finding Abstractions in Natural Language Programming. NL4AI@AI*IA 2020: 59-72 - [c186]Yue Zhan, Michael S. Hsiao:
Breaking Down High-Level Robot Path-Finding Abstractions in Natural Language Programming. AI*IA 2020: 280-297 - [c185]Rahul Krishnamurthy, Michael S. Hsiao:
Transforming Natural Language Specifications to Logical Forms for Hardware Verification. ICCD 2020: 393-396 - [c184]Steven J. Frederiksen, John Aromando
, Michael S. Hsiao:
Automated Assertion Generation from Natural Language Specifications. ITC 2020: 1-5
2010 – 2019
- 2019
- [c183]Rahul Krishnamurthy, Michael S. Hsiao:
EASE: Enabling Hardware Assertion Synthesis from English. RuleML+RR 2019: 82-96 - [c182]Rahul Krishnamurthy, Michael S. Hsiao:
Controlled Natural Language Framework for Generating Assertions from Hardware Specifications. ICSC 2019: 367-370 - 2018
- [c181]Yue Zhan, Michael S. Hsiao:
A Natural Language Programming Application for Lego Mindstorms EV3. AIVR 2018: 27-34 - [c180]Michael S. Hsiao:
Automated Program Synthesis from Object-Oriented Natural Language for Computer Games. CNL 2018: 71-74 - [c179]Kunal Bansal, Michael S. Hsiao:
Optimization of Mutant Space for RTL Test Generation. ICCD 2018: 472-475 - [c178]Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan:
An online framework for diagnosis of multiple defects in scan chains. ISQED 2018: 162-168 - [c177]Michael S. Hsiao, Sarmad Tanwir:
Fast fault coverage estimation of sequential tests using entropy measurements. VTS 2018: 1-6 - 2017
- [c176]Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan:
A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults. ACM Great Lakes Symposium on VLSI 2017: 455-458 - [c175]Sonal Pinto, Michael S. Hsiao:
Fast Search-Based RTL Test Generation Using Control-Flow Path Guidance. ICCD 2017: 399-402 - [c174]Sonal Pinto, Michael S. Hsiao:
RTL functional test generation using factored concolic execution. ITC 2017: 1-10 - [c173]Kelson Gent, Akash Agrawal, Michael S. Hsiao:
A framework for fast test generation at the RTL. VTS 2017: 1-6 - 2016
- [c172]Brendan A. Marcellino, Michael S. Hsiao:
Dynamic partitioning strategy to enhance symbolic execution. DATE 2016: 774-779 - [c171]Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan:
Hardware-in-the-loop model-less diagnostic test generation. HLDVT 2016: 128-135 - [c170]Kelson Gent, Michael S. Hsiao:
Fast Multi-level Test Generation at the RTL. ISVLSI 2016: 553-558 - [c169]Kelson Gent, Michael S. Hsiao:
A control path aware metric for grading functional test vectors. LATS 2016: 51-56 - 2015
- [c168]Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao:
Branch guided functional test generation at the RTL. ETS 2015: 1-6 - [c167]Prateek Puri, Michael S. Hsiao:
SI-SMART: Functional test generation for RTL circuits using loop abstraction and learning recurrence relationships. ICCD 2015: 38-45 - [c166]Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa ElNainay:
Novel SAT-based invariant-directed low-power synthesis. ISQED 2015: 217-222 - [c165]Sharad Bagri, Kelson Gent, Michael S. Hsiao:
Signal domain based reachability analysis in RTL circuits. ISQED 2015: 250-256 - [c164]Prateek Puri, Michael S. Hsiao:
Fast Stimuli Generation for Design Validation of RTL Circuits Using Binary Particle Swarm Optimization. ISVLSI 2015: 573-578 - [c163]Sarmad Tanwir, Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan:
Information-theoretic and statistical methods of failure log selection for improved diagnosis. ITC 2015: 1-10 - [c162]Kelson Gent, Michael S. Hsiao:
Abstraction-based relation mining for functional test generation. VTS 2015: 1-6 - 2014
- [j40]Swarup Bhunia, Michael S. Hsiao, Mainak Banga, Seetharam Narasimhan:
Hardware Trojan Attacks: Threat Analysis and Countermeasures. Proc. IEEE 102(8): 1229-1247 (2014) - [c161]Kelson Gent, Michael S. Hsiao:
Dual-Purpose Mixed-Level Test Generation Using Swarm Intelligence. ATS 2014: 230-235 - [c160]Mahmoud Elbayoumi, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Michael S. Hsiao, Mustafa Y. ElNainay:
TACUE: A Timing-Aware Cuts Enumeration Algorithm for Parallel Synthesis. DAC 2014: 189:1-189:6 - [c159]Kuan-Yu Liao, Po-Juei Chen, Ang-Feng Lin, James Chien-Mo Li, Michael S. Hsiao, Laung-Terng Wang:
GPU-based timing-aware test generation for small delay defects. ETS 2014: 1-2 - [c158]Sarvesh Prabhu, Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao:
Property-checking based LBIST for improved diagnosability. ETS 2014: 1-2 - [c157]Sarvesh Prabhu, Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao:
A diagnosis-friendly LBIST architecture with property checking. ITC 2014: 1-9 - 2013
- [j39]France Bélanger, Robert E. Crossler, Janine S. Hiller, Jung-Min Park, Michael S. Hsiao:
POCKET: A tool for protecting children's privacy online. Decis. Support Syst. 54(2): 1161-1173 (2013) - [j38]Swarup Bhunia, Miron Abramovici, Dakshi Agrawal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, Mohammad Tehranipoor:
Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution. IEEE Des. Test 30(3): 6-17 (2013) - [c156]Kelson Gent, Michael S. Hsiao:
Functional Test Generation at the RTL Using Swarm Intelligence and Bounded Model Checking. Asian Test Symposium 2013: 233-238 - [c155]Avinash R. Desai, Michael S. Hsiao, Chao Wang, Leyla Nazhandali, T. Simin Hall:
Interlocking obfuscation for anti-tamper hardware. CSIIRW 2013: 8 - [c154]Dhrumeel Bakshi, Michael S. Hsiao:
LFSR seed computation and reduction using SMT-based fault-chaining. DATE 2013: 1071-1076 - [c153]Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa Y. ElNainay:
A novel concurrent cache-friendly binary decision diagram construction for multi-core platforms. DATE 2013: 1427-1430 - [c152]Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram:
Test generation for circuits with embedded memories using SMT. ETS 2013: 1 - [c151]Rashmi Moudgil, Dinesh Ganta, Leyla Nazhandali, Michael S. Hsiao, Chao Wang, T. Simin Hall:
A novel statistical and circuit-based technique for counterfeit detection in existing ICs. ACM Great Lakes Symposium on VLSI 2013: 1-6 - [c150]Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa Y. ElNainay:
Set-cover-based critical implications selection to improvesat-based bounded model checking: extended abstract. ACM Great Lakes Symposium on VLSI 2013: 331-332 - [c149]Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa Y. ElNainay:
Selecting critical implications with set-covering formulation for SAT-based Bounded Model Checking. ICCD 2013: 390-395 - 2012
- [j37]Nathan J. Short, A. Lynn Abbott, Michael S. Hsiao, Edward A. Fox:
Reducing descriptor measurement error through Bayesian estimation of fingerprint minutia location and direction. IET Biom. 1(1): 82-90 (2012) - [j36]Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Wen-Ben Jone, Michael S. Hsiao, Fangfang Li, James Chien-Mo Li, Jiun-Lang Huang:
Launch-on-Shift Test Generation for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains. ACM Trans. Design Autom. Electr. Syst. 17(4): 48:1-48:16 (2012) - [c148]Nathaniel J. Short, A. Lynn Abbott, Michael S. Hsiao, Edward A. Fox:
Robust feature extraction in fingerprint images using ridge model tracking. BTAS 2012: 259-264 - [c147]Nathaniel J. Short, A. Lynn Abbott, Michael S. Hsiao, Edward A. Fox:
Temporal analysis of fingerprint impressions. BTAS 2012: 359-364 - [c146]Min Li, Michael S. Hsiao:
RAG: An efficient reliability analysis of logic circuits on graphics processing units. DATE 2012: 316-319 - [c145]Kameshwar Chandrasekar, Supratik K. Misra, Sanjay Sengupta, Michael S. Hsiao:
A scan pattern debugger for partial scan industrial designs. DATE 2012: 558-561 - [c144]Huy Nguyen, Michael S. Hsiao:
Sequential equivalence checking of hard instances with targeted inductive invariants and efficient filtering strategies. HLDVT 2012: 1-8 - [c143]Min Li, Kelson Gent, Michael S. Hsiao:
Design validation of RTL circuits using evolutionary swarm intelligence. ITC 2012: 1-8 - [c142]Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram:
A Novel SMT-Based Technique for LFSR Reseeding. VLSI Design 2012: 394-399 - [c141]Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram:
A SMT-based diagnostic test generation method for combinational circuits. VTS 2012: 215-220 - 2011
- [j35]Saparya Krishnamoorthy, Michael S. Hsiao, Loganathan Lingappan:
Strategies for scalable symbolic execution-driven test generation for programs. Sci. China Inf. Sci. 54(9): 1797-1812 (2011) - [j34]Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Lizhen Yu:
Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 455-463 (2011) - [j33]Min Li, Michael S. Hsiao:
3-D Parallel Fault Simulation With GPGPU. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(10): 1545-1555 (2011) - [c140]Sarvesh Prabhu, Michael S. Hsiao, Saparya Krishnamoorthy, Loganathan Lingappan, Vijay Gangaram, Jim Grundy:
An Efficient 2-Phase Strategy to Achieve High Branch Coverage. Asian Test Symposium 2011: 167-174 - [c139]Mainak Banga, Nikhil P. Rahagude, Michael S. Hsiao:
Design-for-test methodology for non-scan at-speed testing. DATE 2011: 191-196 - [c138]Sung Hee Park, Jonathan Leidig, Lin Tzy Li, Edward A. Fox, Nathan J. Short, Kevin E. Hoyle, A. Lynn Abbott, Michael S. Hsiao:
Experiment and Analysis Services in a Fingerprint Digital Library for Collaborative Research. TPDL 2011: 179-191 - [c137]Min Li, Michael S. Hsiao:
High-Performance Diagnostic Fault Simulation on GPUs. ETS 2011: 210 - [c136]Wei Hu, Huy Nguyen, Michael S. Hsiao:
Sufficiency-based filtering of invariants for Sequential Equivalence Checking. HLDVT 2011: 1-8 - [c135]Min Li, Kelson Gent, Michael S. Hsiao:
Utilizing GPGPUs for design validation with a modified Ant Colony Optimization. HLDVT 2011: 128-135 - [c134]Mainak Banga, Michael S. Hsiao:
ODETTE: A non-scan design-for-test methodology for Trojan detection in ICs. HOST 2011: 18-23 - [c133]Nathan J. Short, A. Lynn Abbott, Michael S. Hsiao, Edward A. Fox:
A Bayesian approach to fingerprint minutia localization and quality assessment using adaptable templates. IJCB 2011: 1-7 - [c132]Kevin E. Hoyle, Nathan J. Short, Michael S. Hsiao, A. Lynn Abbott, Edward A. Fox:
Minutiae + friction ridges = triplet-based features for determining sufficiency in fingerprints. ICDP 2011: 1-6 - [c131]Nathan J. Short, Michael S. Hsiao, A. Lynn Abbott, Edward A. Fox:
Latent fingerprint segmentation using ridge template correlation. ICDP 2011: 1-6 - [c130]Maheshwar Chandrasekar, Michael S. Hsiao:
A Novel Learning Framework for State Space Exploration Based on Search State Extensibility Relation. VLSI Design 2011: 64-69 - [c129]Maheshwar Chandrasekar, Michael S. Hsiao:
Fault Collapsing Using a Novel Extensibility Relation. VLSI Design 2011: 268-273 - [c128]Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao:
Trace Buffer-Based Silicon Debug with Lossless Compression. VLSI Design 2011: 358-363 - 2010
- [j32]Maheshwar Chandrasekar, Nikhil P. Rahagude, Michael S. Hsiao:
Search State Compatibility Based Incremental Learning Framework and Output Deviation Based X-filling for Diagnostic Test Generation. J. Electron. Test. 26(2): 165-176 (2010) - [c127]Min Li, Michael S. Hsiao:
FSimGP^2: An Efficient Fault Simulator with GPGPU. Asian Test Symposium 2010: 15-20 - [c126]Saparya Krishnamoorthy, Michael S. Hsiao, Loganathan Lingappan:
Tackling the Path Explosion Problem in Symbolic Execution-Driven Test Generation for Programs. Asian Test Symposium 2010: 59-64 - [c125]Nikhil P. Rahagude, Maheshwar Chandrasekar, Michael S. Hsiao:
DFT + DFD: An Integrated Method for Design for Testability and Diagnosability. Asian Test Symposium 2010: 218-223 - [c124]Neha Goel, Michael S. Hsiao, Naren Ramakrishnan, Mohammed J. Zaki:
Mining Complex Boolean Expressions for Sequential Equivalence Checking. Asian Test Symposium 2010: 442-447 - [c123]Min Li, Yexin Zheng, Michael S. Hsiao, Chao Huang:
Reversible logic synthesis through ant colony optimization. DATE 2010: 307-310 - [c122]Mainak Banga, Michael S. Hsiao:
Trusted RTL: Trojan Detection Methodology in Pre-silicon Designs. HOST 2010: 56-59 - [c121]Sandesh Prabhakar, Michael S. Hsiao:
Multiplexed trace signal selection using non-trivial implication-based correlation. ISQED 2010: 697-704
2000 – 2009
- 2009
- [j31]Allen B. MacKenzie, Jeffrey H. Reed, Peter M. Athanas, Charles W. Bostian, R. Michael Buehrer, Luiz A. DaSilva, Steven W. Ellingson, Y. Thomas Hou, Michael S. Hsiao, Jung-Min Park, Cameron D. Patterson, Sanjay Raman, Claudio R. C. M. da Silva:
Cognitive Radio and Networking Research at Virginia Tech. Proc. IEEE 97(4): 660-688 (2009) - [c120]Sandesh Prabhakar, Michael S. Hsiao:
Using Non-trivial Logic Implications for Trace Buffer-Based Silicon Debug. Asian Test Symposium 2009: 131-136 - [c119]Michael S. Hsiao, Mainak Banga:
Kiss the Scan Goodbye: A Non-scan Architecture for High Coverage, Low Test Data Volume and Low Test Application Time. Asian Test Symposium 2009: 225-230 - [c118]Nannan He, Michael S. Hsiao:
An efficient path-oriented bitvector encoding width computation algorithm for bit-precise verification. DATE 2009: 1602-1607 - [c117]Maheshwar Chandrasekar, Michael S. Hsiao:
Diagnostic Test Generation for silicon diagnosis with an incremental learning framework based on search state compatibility. HLDVT 2009: 68-75 - [c116]Mainak Banga, Michael S. Hsiao:
VITAMIN: Voltage Inversion Technique to Ascertain Malicious Insertions in ICs. HOST 2009: 104-107 - [c115]Swapneel Donglikar, Mainak Banga, Maheshwar Chandrasekar, Michael S. Hsiao:
Fast circuit topology based method to configure the scan chains in Illinois Scan architecture. ITC 2009: 1-10 - [c114]Min Li, Michael S. Hsiao:
An ant colony optimization technique for abstraction-guided state justification. ITC 2009: 1-10 - [c113]Kaigui Bian, Jung-Min Park, Michael S. Hsiao, France Bélanger, Janine S. Hiller:
Evaluation of Online Resources in Assisting Phishing Detection. SAINT 2009: 30-36 - [c112]Mainak Banga, Michael S. Hsiao:
A Novel Sustained Vector Technique for the Detection of Hardware Trojans. VLSI Design 2009: 327-332 - 2008
- [j30]Lei Fang, Michael S. Hsiao:
Bilateral Testing of Nano-scale Fault-Tolerant Circuits. J. Electron. Test. 24(1-3): 285-296 (2008) - [j29]Hong-Sik Kim, Sungho Kang, Michael S. Hsiao:
A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment. J. Electron. Test. 24(4): 365-378 (2008) - [j28]Lei Fang, Michael S. Hsiao:
Boosting SAT Solver Performance via a New Hybrid Approach. J. Satisf. Boolean Model. Comput. 5(1-4): 243-261 (2008) - [j27]Weixin Wu, Michael S. Hsiao:
Mining Global Constraints With Domain Knowledge for Improving Bounded Sequential Equivalence Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 197-201 (2008) - [j26]Michael S. Hsiao, Robert B. Jones:
Introduction to special section on high-level design, validation, and test. ACM Trans. Design Autom. Electr. Syst. 13(1): 2:1 (2008) - [c111]Karthik Channakeshava, Kaigui Bian, Michael S. Hsiao, Jung-Min Park, Robert E. Crossler, France Bélanger, Payal Aggarwal, Janine S. Hiller:
On Providing Automatic Parental Consent over Information Collection from Children. Security and Management 2008: 196-202 - [c110]Weixin Wu, Michael S. Hsiao:
Efficient Design Validation Based on Cultural Algorithms. DATE 2008: 402-407 - [c109]Xueqi Cheng, Michael S. Hsiao:
Simulation-Directed Invariant Mining for Software Verification. DATE 2008: 682-687 - [c108]Lei Fang, Michael S. Hsiao:
A Fast Approximation Algorithm for MIN-ONE SAT. DATE 2008: 1087-1090 - [c107]Shianling Wu, Laung-Terng Wang, Zhigang Jiang, Jiayong Song, Boryau Sheu, Xiaoqing Wen, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Ravi Apte:
On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs. DFT 2008: 143-151 - [c106]Yexin Zheng, Michael S. Hsiao, Chao Huang:
SAT-based equivalence checking of threshold logic designs for nanotechnologies. ACM Great Lakes Symposium on VLSI 2008: 225-230 - [c105]Mainak Banga, Maheshwar Chandrasekar, Lei Fang, Michael S. Hsiao:
Guided test generation for isolation and detection of embedded trojans in ics. ACM Great Lakes Symposium on VLSI 2008: 363-366 - [c104]Ankur Parikh, Michael S. Hsiao:
On dynamic switching of navigation for semi-formal design validation. HLDVT 2008: 41-48 - [c103]Mainak Banga, Michael S. Hsiao:
A Region Based Approach for the Identification of Hardware Trojans. HOST 2008: 40-47 - [c102]Xueqi Cheng, Michael S. Hsiao:
Ant Colony Optimization directed program abstraction for software bounded model checking. ICCD 2008: 46-51 - [c101]Shrirang M. Yardi, Michael S. Hsiao:
Quantifying the energy efficiency of coordinated micro-architectural adaptation for multimedia workloads. ICCD 2008: 583-590 - [c100]Weixin Wu, Michael S. Hsiao:
SAT-based State Justification with Adaptive Mining of Invariants. ITC 2008: 1-10 - 2007
- [j25]Xiaoding Chen, Michael S. Hsiao:
An Overlapping Scan Architecture for Reducing Both Test Time and Test Power by Pipelining Fault Detection. IEEE Trans. Very Large Scale Integr. Syst. 15(4): 404-412 (2007) - [c99]Michael S. Hsiao, France Bélanger, Janine S. Hiller, Payal Aggarwal, Karthik Channakeshava, Kaigui Bian, Jung-Min Park:
Parents and the Internet: Privacy Awareness, Practices and Control. AMCIS 2007: 460 - [c98]Weixin Wu, Michael S. Hsiao:
Mining Sequential Constraints for Pseudo-Functional Testing. ATS 2007: 19-24 - [c97]Lei Fang, Michael S. Hsiao:
A new hybrid solution to boost SAT solver performance. DATE 2007: 1307-1313 - [c96]Nannan He, Michael S. Hsiao:
Bounded model checking of embedded software in wireless cognitive radio systems. ICCD 2007: 19-24 - [c95]Bin Li, Lei Fang, Michael S. Hsiao:
Efficient power droop aware delay fault testing. ITC 2007: 1-10 - [c94]Ankur Parikh, Weixin Wu, Michael S. Hsiao:
Mining-guided state justification with partitioned navigation tracks. ITC 2007: 1-10 - [c93]Shrirang M. Yardi, Michael S. Hsiao:
Integrating Validation and Verification in the Digital Design Curriculum. MSE 2007: 143-144 - [c92]Vishnu C. Vimjam, Michael S. Hsiao:
Explicit Safety Property Strengthening in SAT-based Induction. VLSI Design 2007: 63-68 - [c91]Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang:
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. VTS 2007: 231-238 - 2006
- [j24]Xiaoding Chen, Michael S. Hsiao:
Testing Embedded Sequential Cores in Parallel Using Spectrum-Based BIST. IEEE Trans. Computers 55(2): 150-162 (2006) - [j23]Qingwei Wu, Michael S. Hsiao:
A New Simulation-Based Property Checking Algorithm Based on Partitioned Alternative Search Space Traversal. IEEE Trans. Computers 55(11): 1325-1334 (2006) - [j22]Manan Syal, Michael S. Hsiao:
New techniques for untestable fault identification in sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1117-1131 (2006) - [j21]Qingwei Wu, Michael S. Hsiao:
State Variable Extraction and Partitioning to Reduce Problem Complexity for ATPG and Design Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2275-2282 (2006) - [j20]Liang Zhang, Indradeep Ghosh, Michael S. Hsiao:
A Framework for Automatic Design Validation of RTL Circuits Using ATPG and Observability-Enhanced Tag Coverage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2526-2538 (2006) - [c90]Vishnu C. Vimjam, Michael S. Hsiao:
Fast illegal state identification for improving SAT-based induction. DAC 2006: 241-246 - [c89]Weixin Wu, Michael S. Hsiao:
Mining global constraints for improving bounded sequential equivalence checking. DAC 2006: 743-748 - [c88]Lei Fang, Michael S. Hsiao:
Bilateral Testing of Nano-scale Fault-tolerant Circuits. DFT 2006: 309-317 - [c87]Kameshwar Chandrasekar, Michael S. Hsiao:
Implicit Search-Space Aware Cofactor Expansion: A Novel Preimage Computation Technique. ICCD 2006: 280-285 - [c86]Xiaoding Chen, Michael S. Hsiao:
Characteristic States and Cooperative Game Based Search for Efficient Sequential ATPG and Design Validation. ITC 2006: 1-10 - [c85]Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty:
A Study of Implication Based Pseudo Functional Testing. ITC 2006: 1-10 - [c84]Vishnu C. Vimjam, Michael S. Hsiao:
Efficient Fault Collapsing via Generalized Dominance Relations. VTS 2006: 258-265 - 2005
- [j19]Xiao Liu, Michael S. Hsiao:
A Novel Transition Fault ATPG That Reduces Yield Loss. IEEE Des. Test Comput. 22(6): 576-584 (2005) - [j18]Anand L. D'Souza, Michael S. Hsiao:
Error Diagnosis of Sequential Circuits Using Region-Based Model. J. Electron. Test. 21(2): 115-126 (2005) - [j17]Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran:
Efficient techniques for transition testing. ACM Trans. Design Autom. Electr. Syst. 10(2): 258-278 (2005) - [c83]Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty:
Untestable Multi-Cycle Path Delay Faults in Industrial Designs. Asian Test Symposium 2005: 194-201 - [c82]Liang Zhang, Mukul R. Prasad, Michael S. Hsiao:
Interleaved Invariant Checking with Dynamic Abstraction. CHARME 2005: 81-96 - [c81]Liang Zhang, Mukul R. Prasad, Michael S. Hsiao, Thomas Sidle:
Dynamic abstraction using SAT-based BMC. DAC 2005: 754-757 - [c80]Shrirang M. Yardi, Michael S. Hsiao, Thomas L. Martin, Dong S. Ha:
Quality-Driven Proactive Computation Elimination for Power-Aware Multimedia Processing. DATE 2005: 340-345 - [c79]Kameshwar Chandrasekar, Michael S. Hsiao:
Integration of Learning Techniques into Incremental Satisfiability for Efficient Path-Delay Fault Test Generation. DATE 2005: 1002-1007 - [c78]Vishnu C. Vimjam, Manan Syal, Michael S. Hsiao:
Untestable fault identification through enhanced necessary value assignments. ACM Great Lakes Symposium on VLSI 2005: 176-181 - [c77]Ronald P. Lajaunie, Michael S. Hsiao:
An effective and efficient ATPG-based combinational equivalence checker. ACM Great Lakes Symposium on VLSI 2005: 248-253 - [c76]Kameshwar Chandrasekar, Michael S. Hsiao:
Forward image computation with backtracing ATPG and incremental state-set construction. ACM Great Lakes Symposium on VLSI 2005: 254-259 - [c75]Manan Syal, Michael S. Hsiao:
VERISEC: verifying equivalence of sequential circuits using SAT. HLDVT 2005: 52-59 - [c74]Qingwei Wu, Michael S. Hsiao:
A new simulation-based property checking algorithm based on partitioned alternative search space traversal. HLDVT 2005: 121-126 - [c73]Vishnu C. Vimjam, Michael S. Hsiao:
Increasing the deducibility in CNF instances for efficient SAT-based bounded model checking. HLDVT 2005: 184-191 - [c72]Shrirang M. Yardi, Karthik Channakeshava, Michael S. Hsiao, Thomas L. Martin, Dong S. Ha:
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management. ICCD 2005: 119-126 - [c71]Manan Syal, Rajat Arora, Michael S. Hsiao:
Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. ICCD 2005: 453-460 - [c70]Kameshwar Chandrasekar, Michael S. Hsiao:
State Set Management for SAT-based Unbounded Model Checking. ICCD 2005: 585-590 - [c69]Xueqi Cheng, Michael S. Hsiao:
Region-level approximate computation reuse for power reduction in multimedia applications. ISLPED 2005: 119-122 - [c68]Daniel C. Nash, Thomas L. Martin, Dong S. Ha, Michael S. Hsiao:
Towards an Intrusion Detection System for Battery Exhaustion Attacks on Mobile Computing Devices. PerCom Workshops 2005: 141-145 - [c67]Kameshwar Chandrasekar, Michael S. Hsiao:
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs. VLSI Design 2005: 189-194 - 2004
- [j16]Shuo Sheng, Michael S. Hsiao:
Success-Driven Learning in ATPG for Preimage Computation. IEEE Des. Test Comput. 21(6): 504-512 (2004) - [j15]Rajat Arora, Michael S. Hsiao:
Using Global Structural Relationships of Signals to Accelerate SAT-based Combinational Equivalence Checking. J. Univers. Comput. Sci. 10(12): 1597-1628 (2004) - [c66]Bin Li, Michael S. Hsiao, Shuo Sheng:
A Novel SAT All-Solutions Solver for Efficient Preimage Computation. DATE 2004: 272-279 - [c65]Xiao Liu, Michael S. Hsiao:
On identifying functionally untestable transition faults. HLDVT 2004: 121-126 - [c64]Rajat Arora, Michael S. Hsiao:
CNF formula simplification using implication reasoning. HLDVT 2004: 129-134 - [c63]Liang Zhang, Mukul R. Prasad, Michael S. Hsiao:
Incremental deductive & inductive reasoning for SAT-based bounded model checking. ICCAD 2004: 502-509 - [c62]Kameshwar Chandrasekar, Michael S. Hsiao:
Decision Selection and Learning for an All-Solutions ATPG Engine. ITC 2004: 607-616 - [c61]Qingwei Wu, Michael S. Hsiao:
State Variable Extraction to Reduce Problem Complexity for ATPG and Design Validation. ITC 2004: 820-829 - [c60]Manan Syal, Michael S. Hsiao, Sreejit Chakravarty:
Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks. ITC 2004: 1034-1043 - [c59]Puneet Gupta, Michael S. Hsiao:
ALAPTF: A new Transition Faultmodel and the ATPG Algorithm. ITC 2004: 1053-1060 - [c58]Thomas L. Martin, Michael S. Hsiao, Dong S. Ha, Jayan Krishnaswami:
Denial-of-Service Attacks on Battery-powered Mobile Computers. PerCom 2004: 309-318 - [c57]Manan Syal, Michael S. Hsiao:
Untestable Fault Identification using Recurrence Relations and Impossible Value Assignments. VLSI Design 2004: 481-486 - [c56]Mukul R. Prasad, Michael S. Hsiao, Jawahar Jain:
Can SAT be used to Improve Sequential ATPG Methods? VLSI Design 2004: 585- - [c55]Rajat Arora, Michael S. Hsiao:
Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications. VLSI Design 2004: 784-787 - [c54]Qingwei Wu, Michael S. Hsiao:
Efficient ATPG for Design Validation Based On Partitioned State Exploration Histories. VTS 2004: 389-405 - 2003
- [j14]Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran:
Efficient Transition Fault ATPG Algorithms Based on Stuck-At Test Vectors. J. Electron. Test. 19(4): 437-445 (2003) - [c53]Liang Zhang, Michael S. Hsiao, Indradeep Ghosh:
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG. Asian Test Symposium 2003: 148-153 - [c52]Manan Syal, Michael S. Hsiao:
A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification. DATE 2003: 10316-10321 - [c51]Shuo Sheng, Michael S. Hsiao:
Efficient Preimage Computation Using A Novel Success-Driven ATPG. DATE 2003: 10822-10827 - [c50]Xiao Liu, Michael S. Hsiao:
Constrained ATPG for Broadside Transition Testing. DFT 2003: 175- - [c49]Rajat Arora, Michael S. Hsiao:
Enhancing SAT-based equivalence checking with static logic implications. HLDVT 2003: 63-68 - [c48]Kameshwar Chandrasekar, Michael S. Hsiao:
ATPG-based preimage computation: efficient search space pruning with ZBDD. HLDVT 2003: 117-122 - [c47]Qingwei Wu, Michael S. Hsiao:
Efficient Sequential ATPG Based on Partitioned Finite-State-Machine Traversal. ITC 2003: 281-289 - [c46]Liang Zhang, Indradeep Ghosh, Michael S. Hsiao:
Efficient Sequential ATPG for Functional RTL Circuits. ITC 2003: 290-298 - [c45]Puneet Gupta, Michael S. Hsiao:
High Quality ATPG for Delay Defects. ITC 2003: 584-591 - [c44]Xiaoding Chen, Michael S. Hsiao:
Energy-Efficient Logic BIST Based on State Correlation Analysis. VTS 2003: 267-272 - [c43]Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty:
Efficient Implication - Based Untestable Bridge Fault Identifier. VTS 2003: 393-402 - 2002
- [j13]Shuo Sheng, Michael S. Hsiao:
Efficient Sequential Test Generation Based on Logic Simulation. IEEE Des. Test Comput. 19(5): 56-64 (2002) - [j12]Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal:
State and Fault Information for Compaction-Based Test Generation. J. Electron. Test. 18(1): 63-72 (2002) - [j11]Sandhya Seshadri, Michael S. Hsiao:
Behavioral-Level DFT via Formal Operator Testability Measures. J. Electron. Test. 18(6): 595-611 (2002) - [j10]Michael S. Hsiao:
Genetic Spot Optimization for Peak Power Estimation in Large VLSI Circuits. VLSI Design 15(1): 407-416 (2002) - [c42]Shuo Sheng, Koichiro Takayama, Michael S. Hsiao:
Effective safety property checking using simulation-based sequential ATPG. DAC 2002: 813-818 - [c41]Michael S. Hsiao:
Maximizing Impossibilities for Untestable Fault Identification. DATE 2002: 949-953 - [c40]Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran:
Novel ATPG algorithms for transition faults. ETW 2002: 47-52 - [c39]Xiaoding Chen, Michael S. Hsiao:
Characteristic faults and spectral information for logic BIST. ICCAD 2002: 294-298 - [c38]Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran:
Techniques to Reduce Data Volume and Application Time for Transition Test. ITC 2002: 983-992 - [c37]Mukul R. Prasad, Michael S. Hsiao, Jawahar Jain:
Improving Sequential ATPG Using SAT Methods. IWLS 2002: 79-84 - [c36]Yufeng Zhao, Michael S. Hsiao:
Reducing Power Consumption by Utilizing Retransmission in Short Range Wireless Network. LCN 2002: 527-533 - [c35]Phillip Stanley-Marbell, Michael S. Hsiao, Ulrich Kremer:
A Hardware Architecture for Dynamic Performance and Energy Adaptation. PACS 2002: 33-52 - [c34]Ganapathy Kasturirangan, Michael S. Hsiao:
Spectrum-Based BIST in Complex SOCs. VTS 2002: 111-116 - 2001
- [j9]Matthew Arnold, Michael S. Hsiao, Ulrich Kremer, Barbara G. Ryder:
Exploring the Interaction between Java?s Implicitly Thrown Exceptions and Instruction Scheduling. Int. J. Parallel Program. 29(2): 111-137 (2001) - [c33]Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal:
Efficient spectral techniques for sequential ATPG. DATE 2001: 204-208 - [c32]Michael S. Hsiao, Jawahar Jain:
Practical use of sequential ATPG for model checking: going the extra mile does pay off. HLDVT 2001: 39-44 - [c31]Phillip Stanley-Marbell, Michael S. Hsiao:
Fast, flexible, cycle-accurate energy estimation. ISLPED 2001: 141-146 - [c30]Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao:
Compiler-directed dynamic voltage/frequency scheduling for energy reduction in mircoprocessors. ISLPED 2001: 275-278 - [c29]Nandini Sridhar, Michael S. Hsiao:
On efficient error diagnosis of digital circuits. ITC 2001: 678-687 - [c28]Anand L. D'Souza, Michael S. Hsiao:
Error Diagnosis of Sequential Circuits Using Region-Based Mode. VLSI Design 2001: 103- - [c27]Sameer Sharma, Michael S. Hsiao:
Combination of Structural and State Analysis for Partial Scan. VLSI Design 2001: 134- - [c26]Nachiketh R. Potlapally, Michael S. Hsiao, Anand Raghunathan, Ganesh Lakshminarayana, Srimat T. Chakradhar:
Accurate Power Macro-modeling Techniques for Complex RTL Circuits. VLSI Design 2001: 235-241 - [c25]Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal:
Novel Spectral Methods for Built-In Self-Test in a System-on-a-Chip Environment. VTS 2001: 163-168 - 2000
- [j8]Sandhya Seshadri, Michael S. Hsiao:
Formal Value-Range and Variable Testability Techniques for High-Level Design-For-Testability. J. Electron. Test. 16(1-2): 131-145 (2000) - [j7]Michael S. Hsiao, Srimat T. Chakradhar:
Test Set Compaction Using Relaxed Subsequence Removal. J. Electron. Test. 16(4): 319-327 (2000) - [j6]Michael S. Hsiao, Srimat T. Chakradhar:
Test Set and Fault Partitioning Techniques for Static Test Sequence Compaction for Sequential Circuits. J. Electron. Test. 16(4): 329-338 (2000) - [j5]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Dynamic state traversal for sequential circuit test generation. ACM Trans. Design Autom. Electr. Syst. 5(3): 548-565 (2000) - [j4]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Peak power estimation of VLSI circuits: new peak power measures. IEEE Trans. Very Large Scale Integr. Syst. 8(4): 435-439 (2000) - [c24]Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal:
Compaction-based test generation using state and fault information. Asian Test Symposium 2000: 159-164 - [c23]Ruofan Xu, Michael S. Hsiao:
Embedded core testing using genetic algorithms. Asian Test Symposium 2000: 254-259 - [c22]Kabir Gulrajani, Michael S. Hsiao:
Multi-Node Static Logic Implications for Redundancy Identification. DATE 2000: 729-733 - [c21]Sandhya Seshadri, Michael S. Hsiao:
Formal operator testability methods for behavioral-level DFT using value ranges. HLDVT 2000: 105-111 - [c20]Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao:
Compiler-Directed Dynamic Frequency and Voltage Scheduling. PACS 2000: 65-81 - [c19]Ankur Jain, Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Michael S. Hsiao:
Testing, Verification, and Diagnosis in the Presence of Unknowns. VTS 2000: 263-270
1990 – 1999
- 1999
- [j3]Michael S. Hsiao:
On Non-Statistical Techniques for Fast Fault Coverage Estimation. J. Electron. Test. 15(3): 239-254 (1999) - [j2]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Fast Static Compaction Algorithms for Sequential Circuit Test Vectors. IEEE Trans. Computers 48(3): 311-322 (1999) - [c18]Michael S. Hsiao:
Peak Power Estimation Using Genetic Spot Optimization for Large VLSI Circuits. DATE 1999: 175- - [c17]Sandhya Seshadri, Michael S. Hsiao:
An integrated approach to behavioral-level design-for-testability using value-range and variable testability techniques. ITC 1999: 858-867 - [c16]Matthew Arnold, Michael S. Hsiao, Ulrich Kremer, Barbara G. Ryder:
Instruction Scheduling in the Presence of Java's Runtime Exceptions. LCPC 1999: 18-34 - [c15]Sameer Sharma, Michael S. Hsiao:
Partial Scan Using Multi-Hop State Reachability Analysis. VTS 1999: 121-127 - [c14]Ankur Jain, Michael S. Hsiao, Vamsi Boppana, Masahiro Fujita:
On the Evaluation of Arbitrary Defect Coverage of Test Sets. VTS 1999: 426-432 - 1998
- [j1]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Application of genetically engineered finite-state-machine sequences to sequential circuit ATPG. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(3): 239-254 (1998) - [c13]Michael S. Hsiao, Srimat T. Chakradhar:
Partitioning and Reordering Techniques for Static Test Sequence Compaction of Sequential Circuits. Asian Test Symposium 1998: 452-457 - [c12]Michael S. Hsiao, Srimat T. Chakradhar:
State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits. DATE 1998: 577-582 - [c11]Michael S. Hsiao:
A fast, accurate, and non-statistical method for fault coverage estimation. ICCAD 1998: 155-161 - [c10]Michael S. Hsiao, Gurjeet S. Saund, Elizabeth M. Rudnick, Janak H. Patel:
Partial Scan Selection Based on Dynamic Reachability and Observability Information. VLSI Design 1998: 174-180 - 1997
- [b1]Michael S. Hsiao:
Sequential Circuit Test Generation Using Genetic Techniques. University of Illinois Urbana-Champaign, USA, 1997 - [c9]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Sequential circuit test generation using dynamic state traversal. ED&TC 1997: 22-28 - [c8]Gurjeet S. Saund, Michael S. Hsiao, Janak H. Patel:
Partial Scan beyond Cycle Cutting. FTCS 1997: 320-328 - [c7]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Effects of delay models on peak power estimation of VLSI sequential circuits. ICCAD 1997: 45-51 - [c6]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
K2: an estimator for peak sustainable power of VLSI circuits. ISLPED 1997: 178-183 - [c5]Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee:
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. VLSI Design 1997: 475-481 - [c4]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors. VTS 1997: 188-195 - 1996
- [c3]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Alternating Strategies for Sequential Circuit ATPG. ED&TC 1996: 368-374 - [c2]Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Automatic test generation using genetically-engineered distinguishing sequences. VTS 1996: 216-223 - 1995
- [c1]Michael S. Hsiao, Janak H. Patel:
A new architectural-level fault simulation using propagation prediction of grouped fault-effects. ICCD 1995: 628-635
Coauthor Index
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