PD - 9.

1322A

PRELIMINARY IRL3303
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology D
l Dynamic dv/dt Rating VDSS = 30V
l 175°C Operating Temperature
l Fast Switching RDS(on) = 0.026Ω
G
l Fully Avalanche Rated
ID = 34A
Description S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance TO-220AB
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 34
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 24 A
IDM Pulsed Drain Current  140
PD @TC = 25°C Power Dissipation 56 W
Linear Derating Factor 0.37 W/°C
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy ‚ 130 mJ
IAR Avalanche Current 20 A
EAR Repetitive Avalanche Energy 5.6 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 2.6 V/ns
TJ Operating Junction and -55 to + 175
T STG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Min. Typ. Max. Units
RθJC Junction-to-Case –––– –––– 2.7
RθCS Case-to-Sink, Flat, Greased Surface –––– 0.50 –––– °C/W
RθJA Junction-to-Ambient –––– –––– 62

11/1/96
IRL3303
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, I D = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.035 ––– V/°C Reference to 25°C, I D = 1mA
––– ––– 0.026 VGS = 10V, ID = 20A „
RDS(on) Static Drain-to-Source On-Resistance Ω
––– ––– 0.040 VGS = 4.5V, I D = 17A „
VGS(th) Gate Threshold Voltage 1.0 ––– ––– V VDS = VGS , ID = 250µA
gfs Forward Transconductance 12 ––– ––– S VDS = 25V, I D = 20A
––– ––– 25 VDS = 30V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V GS = 16V
I GSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 26 ID = 20A
Qgs Gate-to-Source Charge ––– ––– 8.8 nC VDS = 24V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 15 V GS = 4.5V, See Fig. 6 and 13 „
td(on) Turn-On Delay Time ––– 7.4 ––– VDD = 15V
tr Rise Time ––– 200 ––– I D = 20A
ns
td(off) Turn-Off Delay Time ––– 14 ––– RG = 6.5Ω, VGS = 4.5V
tf Fall Time ––– 36 ––– RD = 0.7Ω, See Fig. 10 „
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S

Ciss Input Capacitance ––– 870 ––– VGS = 0V

Coss Output Capacitance ––– 340 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 170 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 34
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G
––– ––– 140
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 20A, VGS = 0V „
t rr Reverse Recovery Time ––– 72 110 ns TJ = 25°C, IF = 20A
Q rr Reverse RecoveryCharge ––– 180 280 nC di/dt = 100A/µs „
t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Specification changes
Rev. # Parameters Old spec. New spec. Comments Revision Date
1 VGS(th) (Max.) 2.5V No spec. Removed V GS(th) (Max). Specification 4/30/96
1 VGS (Max.) ±20 ±16 Decrease VGS ( Max). Specification 4/30/96
Notes:
 Repetitive rating; pulse width limited by ƒ ISD ≤ 20A, di/dt ≤ 140A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. ( See fig. 11 ) TJ ≤ 175°C
‚ VDD = 25V, starting TJ = 25°C, L = 470µH „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 20A. (See Figure 12)
 IRL3303

1000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V
ID , D ra in -to -S o u rc e C u rre n t (A )

ID , D ra in -to -S o u rc e C u rre n t (A )
6.0V 6.0V
4.0V 4.0V
100 3.0V 100 3.0V
BOT TOM 2.5V BOTTOM 2.5V

10 10

2 .5 V
1 1

2 .5V
2 0µ s PU LSE W ID TH 2 0µ s PU L SE W ID TH
T J = 25 °C T J = 1 75 °C
0.1 A 0.1 A
0.1 1 10 100 0.1 1 10 100
V D S , Drain-to-S ource V oltage (V) V D S , Drain-to-S ource Voltage (V )

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.0
I D = 34 A
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
I D , D rain -to- S ou rce C ur ren t (A )

100 1.5
T J = 2 5 °C

TJ = 1 75 °C
(N o rm a li ze d )

10 1.0

1 0.5

V DS = 1 5 V
2 0µ s PU L SE W ID TH V G S = 10 V
0.1 0.0 A
A
2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

V G S , G ate-to -S ource V olta ge (V ) T J , Junction T emperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
IRL3303

1600 15
V GS = 0 V, f = 1M H z I D = 20A
C is s = C gs + C gd , Cds SH OR TE D V DS = 2 4V
1400

V G S , G a te -to -S o u rce V o lta g e (V )

C rss = C gd V DS = 1 5V
C is s C oss = C d s + C gd 12
1200
C , C a p a c ita n c e (p F )

1000
C os s 9

800

6
600
C rss
400
3
200
FO R TEST CIR CU IT
SEE FIG UR E 13
0 A 0 A
1 10 100 0 10 20 30 40
V D S , D rain-to-S ource Voltage (V ) Q G , T otal Gate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
I S D , R e v e rse D ra in C u rre n t (A )

I D , D ra in C u rre n t (A )

100 100 10µ s

TJ = 1 75 °C 100 µs

T J = 25 °C
10 10
1m s

T C = 25 °C 10m s
T J = 17 5°C
VG S = 0 V S ing le Pulse
1 A 1 A
0.0 0.5 1.0 1.5 2.0 2.5 1 10 100
V S D , S ource-to-Drain Voltage (V ) V D S , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
 IRL3303

40
RD
VDS
35
VGS
D.U.T.
I D , D ra in C u rre n t (A m p s)

30
RG
+
-VDD
25

4.5V
20
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15

Fig 10a. Switching Time Test Circuit

10

VDS
5
90%
0 A
25 50 75 100 125 150 175
TC , Case Temperature (°C )
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature

Fig 10b. Switching Time Waveforms

10
Thermal R esponse (Z th JC )

D = 0.5 0
1

0.2 0

0 .1 0

0.05
PD M
0.02
0.1
0.01 t
1
S IN G LE P U LS E t2
(TH E R M A L R E S P O NS E )
N o te s :
1 . D u ty fac to r D = t 1 / t 2

2 . P e a k T J = P D M x Z th J C + T C
0.01 A
0.00001 0.0001 0.001 0.01 0.1 1

t 1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRL3303

300
L ID

E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
VDS TOP 8 .3A
14A
D.U.T. 250
BO TTOM 20 A
RG +
V
- DD 200

4.5 V IAS
tp 150
0.01Ω

Fig 12a. Unclamped Inductive Test Circuit 100

50

V D D = 1 5V
0 A
V(BR)DSS 25 50 75 100 125 150 175

tp Starting TJ , Junction T emperature (°C)

VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS

IAS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

4.5 V +
V
D.U.T. - DS
QGS QGD
VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
 IRL3303

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS
IRL3303
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
1 0 . 5 4 (. 4 1 5 ) 3 . 7 8 (. 1 4 9 ) -B -
2 . 8 7 ( .1 1 3 ) 1 0 . 2 9 (. 4 0 5 ) 3 . 5 4 (. 1 3 9 ) 4 . 6 9 ( .1 8 5 )
2 . 6 2 ( .1 0 3 ) 4 . 2 0 ( .1 6 5 )
-A - 1 .3 2 (. 0 5 2 )
1 .2 2 (. 0 4 8 )
6 . 4 7 (. 2 5 5 )
6 . 1 0 (. 2 4 0 )
4
1 5 . 2 4 ( .6 0 0 )
1 4 . 8 4 ( .5 8 4 )
1 . 1 5 ( .0 4 5 ) L E A D A S S IG N M E N T S
M IN 1 - G A TE
1 2 3 2 - D R AIN
3 - SO URCE
4 - D R AIN
1 4 . 0 9 (.5 5 5 )
1 3 . 4 7 (.5 3 0 ) 4 . 0 6 (. 1 6 0 )
3 . 5 5 (. 1 4 0 )

0 . 9 3 ( .0 3 7 ) 0 . 5 5 (. 0 2 2 )
3 X 0 . 6 9 ( .0 2 7 ) 3X
1 .4 0 (. 0 5 5 ) 0 . 4 6 (. 0 1 8 )
3X
1 .1 5 (. 0 4 5 ) 0 .3 6 (. 0 1 4 ) M B A M 2 .9 2 (. 1 1 5 )
2 .6 4 (. 1 0 4 )
2 . 5 4 ( .1 0 0 )
2X
NO TE S :
1 D I M E N S IO N I N G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 3 O U T L IN E C O N F O R M S T O J E D E C O U T L I N E T O -2 2 0 -A B .
2 C O N T R O L L I N G D IM E N S IO N : I N C H 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .

Part Marking Information

TO-220AB
E X AM PL E : T H IS I S A N IR F1 010
W IT H A S S E MB LY A
L OT CO D E 9 B1M I NT E RN A TIO N AL P AR T NU M BE R
R E C TIF IE R
IRF 10 10
LOG O 9246
9B 1 M D A TE C OD E
A SS E MB LY (Y YW W )
LOT C OD E Y Y = YE A R
W W = W EE K

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http://www.irf.com/ Data and specifications subject to change without notice. 11/96